IP Library Granted Patent US 9,043,736
Granted Patent B2
US 9,043,736 · App. 14/231,110 · Granted May 26, 2015

Circuit design support method, computer product, and circuit design support apparatus

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Quick Facts
Patent No.
US 9,043,736
App. No.
14/231,110
Granted
May 26, 2015
Kind
B2
Abstract

A circuit-design support method includes obtaining information for a circuit having a logic circuit in which signal lines are connected to input terminals, signals of the signal lines being output via the logic circuit; obtaining information concerning a control circuit that has a first flip-flop for scanning and that can control a value of a given signal line by a value set by the first flip-flop; selecting, based on the circuit information, a second flip-flop at an output destination of a signal from the logic circuit, among second flip-flops of the circuit; and generating, based on the control circuit information, information indicating a serial connection of the control circuit between an output source of the signal of the given signal line and the given signal line and a connection of a data input terminal of the first flip-flop and an output terminal of the selected second flip-flop.

Claims (28)

1. A circuit design support method, comprising:

obtaining given circuit information that indicates a given circuit that has a logic circuit in which a plurality of signal lines are connected to input terminals of the logic circuit, wherein signals of the signal lines are output via the logic circuit;

obtaining control circuit information concerning a control circuit that has a first flip-flop for scanning and that is capable of controlling a value of a given signal line among the signal lines that is to be controlled by a value set by the first flip-flop;

selecting by a computer and based on the obtained given circuit information, a second flip-flop among second flip-flops of the given circuit at an output destination of a signal of a given signal line from the logic circuit; and

generating by the computer and based on the obtained control circuit information, connection information that indicates a connection of the control circuit in series between an output source of the signal of the given signal line and the given signal line and a connection of a data input terminal of the first flip-flop and an output terminal of the selected second flip-flop.

2. The circuit design support method according to claim 1 , wherein

the selecting a second flip-flop includes selecting the second flip-flop among the second flip-flops at the output destination whose number of logic steps from the given signal line is within a predetermined number of steps.

3. The circuit design support method according to claim 1 , wherein

the selecting a second flip-flop includes selecting, among the second flip flops at the output destination, the second flip-flop having a least number of logic steps from the given signal line.

4. The circuit design support method according to claim 1 , wherein

the generating connection information includes generating the connection information that indicates a fixing of a value to be input to the data input terminal of the first flip-flop, when there is no second flip-flop at the output destination, the value being fixed at a value that is based on a non-controlled value of the logic circuit.

5. The circuit design support method according to claim 1 , wherein

the selecting a second flip-flop includes selecting, among a plurality of flip flops, a flip-flop having, from the given signal line, a number of logic steps that is least among the second flip-flops at the output destination, and selecting third flip-flops that are for scanning and that are capable of observing a value of a signal line that is to be observed, and are connected to the signal line to be observed within the given circuit.

6. The circuit design support method according to claim 5 , wherein

the selecting a second flip-flop includes selecting a flip-flop among the flip-flops whose number of logic steps is within a predetermined number of steps, among the second flip-flops at the output destination and the third flip-flops.

7. The circuit design support method according to claim 6 , wherein

the generating connection information includes generating the connection information that indicates a fixing of a value to be input to the data input terminal of the first flip-flop, when no flip-flop within the predetermined number of steps is present among the second flip-flops at the output destination and the third flip-flops, the value being fixed at a value that is based on a non-controlled value of the logic circuit.

8. A non-transitory, computer-readable recording medium stores a circuit design support program that causes a computer to execute a process comprising:

obtaining given circuit information that indicates a given circuit that has a logic circuit in which a plurality of signal lines are connected to input terminals of the logic circuit, wherein signals of the signal lines are output via the logic circuit;

obtaining control circuit information concerning a control circuit that has a first flip-flop for scanning and that is capable of controlling a value of a given signal line among the signal lines that is to be controlled by a value set by the first flip-flop;

selecting, based on the obtained given circuit information, a second flip-flop among second flip-flops of the given circuit at an output destination of a signal from the logic circuit; and

generating, based on the obtained control circuit information, a connection information that indicates connection of the control circuit in series between an output source of the signal of the given signal line and the given signal line and a connection of a data input terminal of the first flip-flop and an output terminal of the selected second flip-flop.

9. A circuit design support apparatus comprising:

a processor configured to:

obtain given circuit information that indicates a given circuit that has a logic circuit in which a plurality of signal lines are connected to input terminals of the logic circuit, wherein signals of the signal lines are output via the logic circuit;

obtain control circuit information concerning a control circuit that has a first flip-flop for scanning and that is capable of controlling a value of a given signal line among the signal lines that is to be controlled by a value set by the first flip-flop;

select, based on the obtained given circuit information, a second flip-flop among second flip-flops of the given circuit at an output destination of a signal from the logic circuit; and

generate, based on the obtained control circuit information, connection information that indicates a connection of the control circuit in series between an output source of the signal of the given signal line and the given signal line and a connection of a data input terminal of the first flip-flop and an output terminal of the selected second flip-flop.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 23, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035481/0236 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 1, 2014
From: SETOHARA, YUKINORI
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 034290/0123 →