IP Library Granted Patent US 9,582,099
Granted Patent B2
US 9,582,099 · App. 14/231,445 · Granted Feb 28, 2017

Serrated input sensing intervals

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Quick Facts
Patent No.
US 9,582,099
App. No.
14/231,445
Granted
Feb 28, 2017
Kind
B2
Abstract

Embodiments of the present disclosure provide a technique for input sensing using an input device having a display device with an integrated sensing device. Input sensing is performed over a long sensing interval to attain narrow-band filtering, and is temporarily suspended for short intervals (within the long sensing interval) to refresh the row selection logic of the display device.

Claims (44)

1. A processing system configured to drive an input device comprising a display device with an integrated sensing device, the processing system comprising:

a driver module comprising driver circuitry, wherein the driver module is configured to be coupled to a plurality of sensor electrodes and a plurality of display lines, wherein each sensor electrode comprising at least one common electrode of a plurality of common electrodes configured for display updating and capacitive sensing, wherein the driver module is configured for:

driving row selection logic of the input device to select a first display line of the plurality of display lines for display updating during a display update period of a first display frame;

driving a first sensor electrode of the plurality of sensor electrodes for capacitive sensing during a non-display update period of the first display frame; and

driving the row selection logic during a row selection logic refresh period for display updating, wherein the row selection logic refresh period occurs within the non-display update period.

2. The processing system of claim 1 , wherein the driver module is further configured for:

driving at least one common electrode of the plurality of common electrodes to update the first display line during the display update period.

3. The processing system of claim 1 , wherein driving the row selection logic during the row selection logic refresh period comprises:

updating the row selection logic based on a clock signal without driving the plurality of display lines for display updating.

4. The processing system of claim 1 , wherein the row selection logic comprises at least one dummy stage configured to share charge with a gate selection stage, wherein the gate selection stage is configured to select at least one display line for display updating.

5. The processing system of claim 1 , wherein driving the row selection logic during the row selection logic refresh period comprises:

updating the row selection logic based on a clock signal; and

driving a second display line of the plurality of display lines for display updating during the row selection logic refresh period.

6. The processing system of claim 1 , wherein the plurality of sensor electrodes comprises a plurality of transmitter electrodes and a plurality of receiver electrodes arranged in a row and column configuration, wherein at least one of the transmitter electrodes comprises a common electrode.

7. The processing system of claim 1 , wherein the plurality of sensor electrodes comprises the plurality of common electrodes arranged in a matrix.

8. The processing system of claim 1 , wherein the first display frame comprises a plurality of non-display update periods.

9. The processing system of claim 1 , wherein the non-display update period is sub-divided by the row selection logic refresh period into a first non-display update period and a second non-display update period, wherein the row selection logic refresh period has a shorter duration than the display update period.

10. An input device comprising a display device having a sensing device, the input device further comprising:

a plurality of sensor electrodes configured for capacitive sensing;

a plurality of display lines coupled to row selection logic;

a processing system configured to be coupled to the plurality of sensor electrodes and the plurality of display lines, the processing system configured for:

driving the row selection logic to select a first display line of the plurality of display lines for display updating during a display update period of a first display frame;

driving a first sensor electrode of the plurality of sensor electrodes for capacitive sensing during a non-display update period of the first display frame; and

driving the row selection logic during a row selection logic refresh period for display updating, wherein the row selection logic refresh period occurs within the non-display update period.

11. The input device of claim 10 , wherein driving the row selection logic during the row selection logic refresh period comprises:

updating the row selection logic based on a clock signal without driving the plurality of display lines for display updating.

12. The input device of claim 10 , wherein driving the row selection logic during the row selection logic refresh period comprises:

updating the row selection logic based on a clock signal; and

driving a second display line of the plurality of display lines for display updating during the row selection logic refresh period.

13. The input device of claim 10 , wherein the row selection logic comprises at least one dummy stage configured to share charge with a gate selection stage, wherein the gate selection stage is configured to select at least one display line for display updating.

14. The input device of claim 10 , wherein the plurality of sensor electrodes comprises a plurality of transmitter electrodes and a plurality of receiver electrodes arranged in a row and column configuration, wherein at least one of the plurality of sensor electrodes comprises a common electrode configured for display updating and capacitive sensing.

15. The input device of claim 10 , wherein the plurality of sensor electrodes comprises a plurality of common electrodes arranged in a matrix, wherein the plurality of common electrodes are configured for display updating and capacitive sensing.

16. The input device of claim 10 , wherein the non-display update period is sub-divided by the row selection logic refresh period into a first non-display update period and a second non-display update period, wherein the row selection logic refresh period has a shorter duration than the display update period.

17. A method of input sensing with a display device integrated with a sensing device having a plurality of display lines coupled to row selection logic, a plurality of sensor electrodes, the method comprising:

driving row selection logic of the display device to select a first display line of the plurality of display lines for display updating during a display update period of a first display frame;

driving a first sensor electrode of the plurality of sensor electrodes for capacitive sensing during a non-display update period of the first display frame; and

driving the row selection logic during a row selection logic refresh period for display updating, wherein the row selection logic refresh period occurs within the non-display update period.

18. The method of claim 17 , wherein each sensor electrodes comprises one or more common electrodes configured for display update and capacitive sensing, the method further comprising:

driving at least one common electrode to update the first display line during the display update period.

19. The method of claim 17 , wherein driving the row selection logic during the row selection logic refresh period comprises:

updating the row selection logic based on a clock signal without driving the plurality of display lines for display updating, wherein the row selection logic comprises at least one dummy stage configured to share charge with a gate selection stage, wherein the gate selection stage is configured to select at least one display line for display updating.

20. The method of claim 17 , wherein driving the row selection logic during the row selection logic refresh period comprises:

updating the row selection logic based on a clock signal; and

driving a second display line of the plurality of display lines for display updating during the row selection logic refresh period.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2021
From: CREATIVE LEGEND SEMICONDUCTOR (HONG KONG) LIMITED
To: OMNIVISION TDDI ONTARIO LIMITED PARTNERSHIP
Reel/Frame 058035/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2020
From: SYNAPTICS INCORPORATED
To: CREATIVE LEGEND SEMICONDUCTOR (HONG KONG) LIMITED
Reel/Frame 052457/0740 →
RELEASE OF SECURITY INTEREST Recorded Apr 20, 2020
From: WELLS FARGO BANK, NATIONAL ASSOCIATION
To: SYNAPTICS INCORPORATED
Reel/Frame 052441/0289 →
SECURITY INTEREST Recorded Sep 27, 2017
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 044037/0896 →
SECURITY INTEREST Recorded Oct 3, 2014
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 033889/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2014
From: SMALL, JEFFREY A.
To: SYNAPTICS INCORPORATED
Reel/Frame 032569/0888 →