IP Library Granted Patent US 9,236,422
Granted Patent B2
US 9,236,422 · App. 14/236,361 · Granted Jan 12, 2016

Display panel and production method for same

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Quick Facts
Patent No.
US 9,236,422
App. No.
14/236,361
Granted
Jan 12, 2016
Kind
B2
Abstract

Provided is a display panel having a plurality of pixels arranged in a matrix of rows and columns. Each of the pixels is composed of a plurality of first sub-pixels emitting light of different colors. Each of the first sub-pixels is composed of a plurality of second sub-pixels emitting light of the same color. Each of the second sub-pixels includes: a first electrode; a second electrode above the first electrode; and a light-emitting layer between the first electrode and the second electrode.

Claims (87)

1. An active matrix display panel having a plurality of pixels arranged in a matrix of rows and columns, wherein

each of the pixels is composed of a plurality of first sub-pixels emitting light of different colors,

each of the first sub-pixels is composed of a plurality of second sub-pixels emitting light of the same color,

each of the second sub-pixels includes:

a first electrode;

a second electrode above the first electrode;

a light-emitting layer between the first electrode and the second electrode; and

a pixel circuit configured to feed power to the first electrode, and

the pixel circuit includes a gate line and a data line.

2. The active matrix display panel of claim 1 , wherein

the first electrode is a pixel electrode provided individually for each of the second sub-pixels, and

the second electrode is a part, above the pixel electrode, of a common electrode provided to extend across the plurality of pixels.

3. The active matrix display panel of claim 1 , wherein

the first electrode is a part of a pixel electrode provided individually for each of the first sub-pixels, and

the second electrode is a part, above the part of the pixel electrode, of a common electrode provided to extend across the plurality of pixels.

4. The active matrix display panel of claim 3 , wherein

at least one of the first sub-pixels includes at least one second sub-pixel having a display defect.

5. The active matrix display panel of claim 4 , wherein

the display defect is attributed to a defect of the pixel circuit,

in each second sub-pixel not having the display defect, the pixel circuit is electrically connected to the first electrode, and

in each second sub-pixel having the display defect, the pixel circuit is electrically disconnected from the first electrode.

6. The active matrix display panel of claim 5 , wherein

the pixel circuit includes a thin-film transistor element.

7. The active matrix display panel of claim 4 , wherein

the display defect is at least one of an unlit dot and a dark dot.

8. The active matrix display panel of claim 1 , wherein

the number of the second sub-pixels is an integer multiple of the number of the first sub-pixels.

9. The active matrix display panel of claim 1 , wherein

the plurality of second sub-pixels included in each of the first sub-pixels are arranged adjacently.

10. The active matrix display panel of claim 1 , wherein

the plurality of second sub-pixels included in each of the first sub-pixels are arranged separately with a second sub-pixel emitting light of a different color therebetween.

11. A method for manufacturing an active matrix display panel, the method comprising:

preparing a substrate; and

forming, on the substrate, a plurality of pixels arranged in a matrix of rows and columns, wherein

the forming of the pixels includes

forming, for each of the pixels, a plurality of first sub-pixels emitting light of different colors,

the forming of the first sub-pixels includes

forming, for each of the first sub-pixels, a plurality of second sub-pixels emitting light of the same color, and

the forming of the second sub-pixels includes:

forming a first electrode;

forming a second electrode above the first electrode;

forming a light-emitting layer between the first electrode and the second electrode;

forming a pixel circuit configured to feed power to the first electrode; and

forming a gate line and a data line for the pixel circuit.

12. A method for manufacturing an active matrix display panel, the method comprising:

preparing a substrate; and

forming, on the substrate, a plurality of pixels arranged in a matrix of rows and columns, wherein

the preparing of the substrate includes:

forming a thin-film transistor array substrate including pixel circuits arranged in a matrix of rows and columns, each of the pixel circuits including a thin-film transistor element, a gate line, and a data line; and

after forming the thin-film transistor array substrate, inspecting the thin-film transistor array substrate for any display defect, and

the forming of the pixels includes:

when the display defect found in the inspecting of the thin-film transistor array substrate is not within an allowable range, forming pixel electrodes such that one pixel electrode is allocated to each group of pixel circuits, the number of the pixel circuits included in each group being an integer equal to or greater than two;

forming light-emitting layers on the respective pixel electrodes; and

forming, on the light-emitting layers, a common electrode to extend across the plurality of pixels.

13. The method for manufacturing the active matrix display panel of Claim 12 , wherein

in the forming of the pixel electrodes, an area of each of the pixel electrodes is an integer multiple of an area of each of the pixel circuits, the integer being equal to or greater than two.

14. The method for manufacturing the active matrix display panel of claim 12 , wherein

the preparing of the substrate further includes

after forming the thin-film transistor array substrate and before inspecting the thin-film transistor array substrate, forming an insulation film on the thin-film transistor array substrate, the insulation film having contact holes.

15. A method for manufacturing an active matrix display panel, the method comprising:

preparing a substrate; and

forming, on the substrate, a plurality of pixels arranged in a matrix of rows and columns, wherein

the preparing of the substrate includes:

forming a thin-film transistor array substrate including pixel circuits arranged in a matrix of rows and columns, each of the pixel circuits including a thin-film transistor element, a gate line, and a data line; and

forming an insulation film on the thin-film transistor array substrate, the insulation film having contact holes,

the forming of the pixels includes:

forming, on the insulation film, pixel electrodes such that one pixel electrode is allocated to each of the pixel circuits;

inspecting the pixel electrodes for any defect;

forming, on the insulation film, a partition wall having apertures;

forming light-emitting layers on one or more pixel electrodes in the respective apertures; and

forming, on the light-emitting layers, a common electrode to extend across the plurality of pixels, and

in the forming of the partition wall, when the display defect found in the inspecting of the pixel electrodes is not within an allowable range, forming the apertures such that one aperture is allocated to each group of pixel electrodes, the number of the pixel electrodes included in each group being an integer equal to or greater than two.

16. The method for manufacturing the active matrix display panel of claim 15 , wherein

in forming of the partition wall, an area of each of the apertures is an integer multiple of an area of each of the pixel electrodes, the integer being equal to or greater than two.

17. A method for manufacturing an active matrix display panel, the method comprising:

preparing a substrate; and

forming, on the substrate, a plurality of pixels arranged in a matrix of rows and columns, wherein

the preparing of the substrate includes:

forming a thin-film transistor array substrate including pixel circuits arranged in a matrix of rows and columns, each of the pixel circuits including a thin-film transistor element, a gate line, and a data line; and

forming an insulation film on the thin-film transistor array substrate, the insulation film having contact holes,

the forming of the pixels includes:

forming, on the insulation film, pixel electrodes such that one pixel electrode is allocated to each of the pixel circuits;

forming, on the insulation film, a partition wall having apertures provided for the respective pixel electrodes;

inspecting the pixel electrodes or the partition wall for any defect;

forming light-emitting layers on the respective pixel electrodes in the apertures; and

forming, on the light-emitting layers, a common electrode to extend across the plurality of pixels, and

in forming of the light-emitting layers, when the defect found in the inspecting of the pixel electrodes or the partition wall is not within an allowable range, light-emitting layers emitting light of the same color are formed in apertures in the same unit, and light-emitting layers emitting light of different colors are formed in apertures in different units, each unit being composed of a plurality of adjacent apertures.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2015
From: PANASONIC CORPORATION
To: JOLED INC
Reel/Frame 035187/0483 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2014
From: NISHIYAMA, SEIJI; NAITO, YASUSHI
To: PANASONIC CORPORATION
Reel/Frame 032891/0208 →