Method and apparatus for automated vulnerability detection

1. A cloud based architecture for automated vulnerability identification demonstration comprising:

distributed cloud processing circuitry including a plurality of processors configured to execute instructions for:

receiving a program and employing a disassembler to disassemble the program;

generating a function call tree for the program based on disassembly of the program;

receiving an indication of a post condition for which analysis of the program is desired;

transforming program statements into logical equations;

simplifying the logical equations;

propagating each path of the function call tree, based on post conditions, backwards via Dijkstra's weakest preconditions variant;

analyzing aliases and processing loops to generate a precondition, wherein analyzing aliases is performed using an “if-then-else” expression through a satisfiability modulo theories (STM) solver and processing loops comprises unrolling each of the loops of each path;

using an automated solver to determine whether the precondition is realizable and, if so,

providing program inputs required to realize the precondition;

identifying code vulnerabilities of the program based on the provided program inputs, wherein the code vulnerabilities would allow an attacker to introduce and execute code on a computer executing the program; and

generating analysis results including at least the identified code vulnerabilities, the analysis results being providable to a user, in an interactive tool, using a user interface.

2. The cloud based architecture of claim 1 , wherein receiving the indication of the post condition comprises referencing a predetermined post condition defined for a batch processing system.

3. The cloud based architecture of claim 2 , wherein the batch processing employs an automatically operated check for classes of vulnerabilities defined based on the predetermined post condition.

4. The cloud based architecture of claim 1 , wherein the processing circuitry is further configured for pruning and slicing of flow graphs.

5. The cloud based architecture of claim 1 , wherein analyzing aliases comprises:

executing path generation to identify possible aliasing conditions associated with the program; and

executing path analysis to independently evaluate the paths for aliasing.

6. The cloud based architecture of claim 1 , wherein the processing circuitry is further configured for describing all possible aliasing combinations in a single expression.

7. The cloud based architecture of claim 6 , wherein the processing circuitry is further configured for describing all possible aliasing combinations in a single expression via employing the satisfiability modulo theories (SMT) solver to exhaustively search for any alias combinations that are both possible and satisfy the post condition.

8. The cloud based architecture of claim 1 , wherein processing loops further comprises:

identifying and representing all paths and loops;

determining loop dependencies to guide the order in which loops are enabled to be unrolled;

enabling user selection of a directed acyclic path from an entry point into the program to a target statement where the user desires the program to be;

determining the order in which loops along a selected path are enabled to be unrolled; and

processing the loops in order using a loop unrolling approach.

9. A method for automated vulnerability identification demonstration executable via operation of cloud based architecture comprising distributed cloud processing circuitry including a plurality of processors, the method comprising:

receiving a program and employing a disassembler to disassemble the program;

generating a function call tree for the program based on disassembly of the program;

receiving an indication of a post condition for which analysis of the program is desired;

transforming program statements into logical equations;

simplifying the logical equations;

propagating each path of the function call tree, based on post conditions, backwards via Dijkstra's weakest preconditions variant;

analyzing aliases and processing loops to generate a precondition, wherein analyzing aliases is performed using an “if-then-else” expression through a satisfiability modulo theories STM solver and processing loops comprises unrolling each of the loops of each of path;

using an automated solver to determine whether the precondition is realizable and, if so,

providing program inputs required to realize the precondition;

identifying code vulnerabilities of the program based on the provided program inputs, wherein the code vulnerabilities would allow an attacker to introduce and execute code on a computer executing the program; and

generating analysis results including at least the identified code vulnerabilities, the analysis results being providable to a user, in an interactive tool, using a user interface.

10. The method of claim 9 , wherein receiving the indication of the post condition comprises referencing a predetermined post condition defined for a batch processing system.

11. The method of claim 10 , wherein the batch processing employs an automatically operated check for classes of vulnerabilities defined based on the predetermined post condition.

12. The method of claim 9 , wherein the processing circuitry is further configured for

pruning and slicing of flow graphs.

13. The method of claim 9 , wherein analyzing aliases comprises:

executing path generation to identify possible aliasing conditions associated with the program; and

executing path analysis to independently evaluate the paths for aliasing.

14. The method of claim 9 , wherein the processing circuitry is further configured for describing all possible aliasing combinations in a single expression.

15. The method of claim 14 , wherein the processing circuitry is further configured for describing all possible aliasing combinations in a single expression via employing the satisfiability modulo theories (SMT) solver to exhaustively search for any alias combinations that are both possible and satisfy the post condition.

16. The method of claim 9 , wherein processing loops further comprises:

identifying and representing all paths and loops;

determining loop dependencies to guide the order in which loops are enabled to be unrolled;

enabling user selection of a directed acyclic path from an entry point into the program to a target statement where the user desires the program to be;

determining the order in which loops along a selected path are enabled to be unrolled; and

processing the loops in order using a loop unrolling approach.

17. The cloud based architecture of claim 1 , wherein receiving the indication of the post condition comprises receiving a user input defining the post condition.

18. The cloud based architecture of claim 17 , wherein the processing circuitry is further configured for receiving an indication from the user identifying a location at which to apply the analysis of the program.

19. The method of claim 9 , wherein receiving the indication of the post condition comprises receiving a user input defining the post condition.

20. The method of claim 19 , wherein the processing circuitry is further configured for receiving an indication from the user identifying a location at which to apply the analysis of the program.