IP Library Granted Patent US 8,981,977
Granted Patent B2
US 8,981,977 · App. 14/243,679 · Granted Mar 17, 2015

System and method for low-power digital signal processing

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Quick Facts
Patent No.
US 8,981,977
App. No.
14/243,679
Granted
Mar 17, 2015
Kind
B2
Abstract

A system and method for low-power digital signal processing, for example, comprising adjusting a digital representation of an input signal.

Claims (105)

1. A low-power digital processing system comprising:

at least one module that operates to, at least:

analyze an input signal represented by a first digital representation;

based at least in part on the analysis of the input signal, determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation prior to performing a next digital signal processing function on the input signal; and

if it is determined to adjust the digital representation of the level of the input signal, then at least:

adjust the digital representation of a level of the input signal to the second digital representation; and

perform the next digital signal processing function on the second digital representation of the input signal to form an output signal,

wherein:

a level of the output signal is represented by a digital representation like the second digital representation of the level of input signal; and

the at least one module operates to adjust the digital representation of the level of the output signal to a digital representation like the first digital representation.

2. The low-power digital processing system of claim 1 , wherein the at least one module operates to adjust the digital representation of the level of the output signal to a digital representation like the first digital representation by, at least in part, operating to restore a signal gain of the output signal to a signal gain of the input signal.

3. The low-power digital processing system of claim 1 , wherein the second digital representation results in a lower number of bit state changes when performing the next digital signal processing function on the input signal than the first digital representation.

4. The low-power digital processing system of claim 1 , wherein the at least one module is operable to determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation based, at least in part, on energy consumption.

5. A low-power digital processing system comprising:

at least one module that operates to, at least:

analyze an input signal represented by a first digital representation;

based at least in part on the analysis of the input signal, determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation prior to performing a next digital signal processing function on the input signal; and

if it is determined to adjust the digital representation of the level of the input signal, then at least:

adjust the digital representation of a level of the input signal to the second digital representation; and

perform the next digital signal processing function on the second digital representation of the input signal to form an output signal,

wherein the at least one module is operable to analyze the input signal by, at least in part, determining a quality level of the input signal.

6. A low-power digital processing system comprising:

at least one module that operates to, at least:

analyze an input signal represented by a first digital representation;

based at least in part on the analysis of the input signal, determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation prior to performing a next digital signal processing function on the input signal; and

if it is determined to adjust the digital representation of the level of the input signal, then at least:

adjust the digital representation of a level of the input signal to the second digital representation; and

perform the next digital signal processing function on the second digital representation of the input signal to form an output signal,

wherein the at least one module is operable to analyze the input signal by, at least in part, determining whether a DC offset can be added to the input signal without causing clipping.

7. A low-power digital processing system comprising:

at least one module that operates to, at least:

analyze an input signal represented by a first digital representation;

based at least in part on the analysis of the input signal, determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation prior to performing a next digital signal processing function on the input signal; and

if it is determined to adjust the digital representation of the level of the input signal, then at least:

adjust the digital representation of a level of the input signal to the second digital representation; and

perform the next digital signal processing function on the second digital representation of the input signal to form an output signal

wherein the at least one module is operable to analyze the input signal by, at least in part, determining whether a different type of digital representation of the input signal will result in fewer bit transitions when performing the next digital signal processing function.

8. The low-power digital processing system of claim 1 , wherein the second digital representation comprises a lower number of bits representing the input signal relative to the first digital representation.

9. A low-power digital processing system comprising:

at least one module that operates to, at least:

analyze an input signal represented by a first digital representation;

based at least in part on the analysis of the input signal, determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation prior to performing a next digital signal processing function on the input signal; and

if it is determined to adjust the digital representation of the level of the input signal, then at least:

adjust the digital representation of a level of the input signal to the second digital representation; and

perform the next digital signal processing function on the second digital representation of the input signal to form an output signal,

wherein the second digital representation comprises a lower number of bits representing the input signal relative to the first digital representation, and

wherein the at least one module operates to adjust the digital representation of a level of the input signal to the second digital representation by, at least in part, decreasing a dynamic range of the input signal.

10. A low-power digital processing system comprising:

at least one module that operates to, at least:

analyze an input signal represented by a first digital representation;

based at least in part on the analysis of the input signal, determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation prior to performing a next digital signal processing function on the input signal; and

if it is determined to adjust the digital representation of the level of the input signal, then at least:

adjust the digital representation of a level of the input signal to the second digital representation; and

perform the next digital signal processing function on the second digital representation of the input signal to form an output signal,

wherein the second digital representation comprises a lower number of zero crossings in digitally representing the input signal relative to the first digital representation.

11. The low-power digital processing system of claim 10 , wherein the at least one module operates to adjust the digital representation of the input signal to the second digital representation by, at least in part, shifting a dynamic range of the input signal.

12. A low-power digital processing system comprising:

at least one module that operates to, at least:

analyze an input signal represented by a first digital representation;

based at least in part on the analysis of the input signal, determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation prior to performing a next digital signal processing function on the input signal; and

if it is determined to adjust the digital representation of the level of the input signal, then at least:

adjust the digital representation of a level of the input signal to the second digital representation; and

perform the next digital signal processing function on the second digital representation of the input signal to form an output signal,

wherein the second digital representation comprises a lower number of zero crossings when performing the next digital signal processing function on the input signal relative to the first digital representation.

13. A low-power digital processing system comprising:

at least one module that operates to, at least:

analyze an input signal represented by a first digital representation;

based at least in part on the analysis of the input signal, determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation prior to performing a next digital signal processing function on the input signal; and

if it is determined to adjust the digital representation of the level of the input signal, then at least:

adjust the digital representation of a level of the input signal to the second digital representation; and

perform the next digital signal processing function on the second digital representation of the input signal to form an output signal,

wherein the second digital representation comprises a different type of digital number representation than the first digital representation.

14. A low-power digital processing system comprising:

at least one module that operates to, at least:

analyze an input signal characterized by a first dynamic range;

based at least in part on the analysis of the input signal, determine whether to adjust the first dynamic range of the input signal to a second dynamic range prior to performing a next digital signal processing function on the input signal; and

if it is determined to adjust the first dynamic range of the input signal, then at least:

adjust the first dynamic range of the input signal to the second dynamic range; and

perform the next digital signal processing function on the input signal characterized by the second dynamic range to form an output signal

wherein the at least one module operates to adjust the first dynamic range of the input signal by, at least in part, shifting the first dynamic range, where said shifting the first dynamic range of the input signal comprises adding a digital offset to the input signal.

15. The low-power digital processing system of claim 14 , wherein the at least one module operates to adjust the first dynamic range of the input signal by, at least in part, reducing the size of the first dynamic range.

16. The low-power digital processing system of claim 15 , wherein said reducing the size of the first dynamic range comprises using fewer digital bits to represent the input signal.

17. The low-power digital processing system of claim 14 , wherein the at least one module operates to analyze the input signal by, at least in part, determining a quality level of the input signal.

18. The low-power digital processing system of claim 17 , wherein said determining a quality level of the input signal comprises determining a signal-to-noise ratio of the input signal.

19. The low-power digital processing system of claim 5 , wherein the second digital representation results in a lower number of bit state changes when performing the next digital signal processing function on the input signal than the first digital representation.

20. The low-power digital processing system of claim 5 , wherein the at least one module is operable to determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation based, at least in part, on energy consumption.

21. The low-power digital processing system of claim 5 , wherein the second digital representation comprises a lower number of bits representing the input signal relative to the first digital representation.

22. The low-power digital processing system of claim 6 , wherein the second digital representation results in a lower number of bit state changes when performing the next digital signal processing function on the input signal than the first digital representation.

23. The low-power digital processing system of claim 6 , wherein the at least one module is operable to determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation based, at least in part, on energy consumption.

24. The low-power digital processing system of claim 6 , wherein the second digital representation comprises a lower number of bits representing the input signal relative to the first digital representation.

25. The low-power digital processing system of claim 7 , wherein the second digital representation results in a lower number of bit state changes when performing the next digital signal processing function on the input signal than the first digital representation.

26. The low-power digital processing system of claim 7 , wherein the at least one module is operable to determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation based, at least in part, on energy consumption.

27. The low-power digital processing system of claim 7 , wherein the second digital representation comprises a lower number of bits representing the input signal relative to the first digital representation.

28. The low-power digital processing system of claim 9 , wherein the second digital representation results in a lower number of bit state changes when performing the next digital signal processing function on the input signal than the first digital representation.

29. The low-power digital processing system of claim 9 , wherein the at least one module is operable to determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation based, at least in part, on energy consumption.

30. The low-power digital processing system of claim 9 , wherein the second digital representation comprises a lower number of bits representing the input signal relative to the first digital representation.

31. The low-power digital processing system of claim 10 , wherein the second digital representation results in a lower number of bit state changes when performing the next digital signal processing function on the input signal than the first digital representation.

32. The low-power digital processing system of claim 10 , wherein the at least one module is operable to determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation based, at least in part, on energy consumption.

33. The low-power digital processing system of claim 10 , wherein the second digital representation comprises a lower number of bits representing the input signal relative to the first digital representation.

34. The low-power digital processing system of claim 12 , wherein the second digital representation results in a lower number of bit state changes when performing the next digital signal processing function on the input signal than the first digital representation.

35. The low-power digital processing system of claim 12 , wherein the at least one module is operable to determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation based, at least in part, on energy consumption.

36. The low-power digital processing system of claim 12 , wherein the second digital representation comprises a lower number of bits representing the input signal relative to the first digital representation.

37. The low-power digital processing system of claim 13 , wherein the second digital representation results in a lower number of bit state changes when performing the next digital signal processing function on the input signal than the first digital representation.

38. The low-power digital processing system of claim 13 , wherein the at least one module is operable to determine whether to adjust a digital representation of a level of the input signal to a second digital representation different from the first digital representation based, at least in part, on energy consumption.

39. The low-power digital processing system of claim 13 , wherein the second digital representation comprises a lower number of bits representing the input signal relative to the first digital representation.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Jun 23, 2021
From: MUFG UNION BANK, N.A.
To: MAXLINEAR, INC.; EXAR CORPORATION; MAXLINEAR COMMUNICATIONS LLC
Reel/Frame 056656/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2021
From: MAXLINEAR, INC.
To: ENTROPIC COMMUNICATIONS, LLC
Reel/Frame 055898/0230 →
RELEASE OF SECURITY INTEREST Recorded Mar 31, 2021
From: MUFG UNION BANK, N.A.
To: MAXLINEAR, INC.; MAXLINEAR COMMUNICATIONS LLC
Reel/Frame 055779/0001 →
SUCCESSION OF AGENCY (REEL 042453 / FRAME 0001) Recorded Jul 1, 2020
From: JPMORGAN CHASE BANK, N.A.
To: MUFG UNION BANK, N.A.
Reel/Frame 053115/0842 →
SECURITY AGREEMENT Recorded May 12, 2017
From: MAXLINEAR, INC.; ENTROPIC COMMUNICATIONS, LLC (F/K/A ENTROPIC COMMUNICATIONS, INC.); EXAR CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042453/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2014
From: LING, CURTIS; DUAN, JINING
To: MAXLINEAR, INC.
Reel/Frame 032591/0719 →