IP Library Granted Patent US 9,129,875
Granted Patent B2
US 9,129,875 · App. 14/244,139 · Granted Sep 8, 2015

Solid-state imaging device and method for manufacturing the same

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Quick Facts
Patent No.
US 9,129,875
App. No.
14/244,139
Granted
Sep 8, 2015
Kind
B2
Abstract

In a pixel unit of a solid-state imaging device, a semiconductor substrate is provided with a plurality of photodiodes, a first insulating film includes a recess in a portion above each of the photodiodes, a second insulating film embeds the recess, a plurality of color filters is formed on the second insulating film, the color filters each corresponding to one of the photodiodes, a partition is provided between adjacent ones of the color filters, the partition being a part of a third insulating film, and in an area outside of the pixel unit, (i) a conductive film at least partially covered by the third insulating film is formed on the second insulating film, and (ii) the third insulating film formed on the conductive film and on the second insulating film near the conductive film has a film thickness smaller than a film thickness of the partition.

Claims (54)

1. A solid-state imaging device including a pixel unit configured to perform photoelectric conversion on incident light, the solid-state imaging device comprising:

a semiconductor substrate;

a second insulating film formed above the semiconductor substrate; and

a third insulating film formed on the second insulating film,

wherein in the pixel unit,

a plurality of color filters are formed above the third insulating film,

a partition is provided between adjacent ones of the color filters, the partition being a part of the third insulating film, and

in an area outside of the pixel unit,

a conductive film at least partially covered by the third insulating film is formed on the second insulating film, and

the third insulating film is a film which reduces a difference in level resulting from the conductive film or the second insulating film.

2. The solid-state imaging device according to claim 1 , further comprising

a first insulating film between the semiconductor substrate and the second insulating film,

wherein in the pixel unit,

the semiconductor substrate is provided with a plurality of photodiodes,

a portion of the first insulating film has a recess, the portion being located above each of the photodiodes,

the second insulating film embeds the recess, and

the second insulating film in the recess forms an optical waveguide which guides light to the photodiode.

3. The solid-state imaging device according to claim 1 ,

wherein the pixel unit includes a photoelectric conversion film between the semiconductor substrate and the second insulating film.

4. The solid-state imaging device according to claim 1 ,

wherein the third insulating film formed on the conductive film and on the second insulating film near the conductive film has a film thickness smaller than a film thickness of the partition.

5. The solid-state imaging device according to claim 1 ,

wherein in the area outside of the pixel unit,

the third insulating film near the conductive film is provided with a groove, and

out of inner wall surfaces of the groove, an inner wall surface on a far side as viewed from the conductive film is separated from the conductive film by a distance that is greater than or equal to a film thickness of the partition.

6. The solid-state imaging device according to claim 1 ,

wherein the third insulating film is made of a film having a refractive index lower than a refractive index of the second insulating film.

7. The solid-state imaging device according to claim 1 ,

wherein the area outside of the pixel unit includes a light-shielding unit, and

the conductive film is a light-shielding film formed in the light-shielding unit.

8. The solid-state imaging device according to claim 2 ,

wherein the area outside of the pixel unit includes a peripheral circuit unit,

the peripheral circuit unit includes:

a line formed in the first insulating film; and

a pad electrode which is formed on the line and is electrically connected to the line, and

the conductive film is the pad electrode.

9. The solid-state imaging device according to claim 2 ,

wherein the area outside of the pixel unit includes a light-shielding unit and a peripheral circuit unit formed outside the light-shielding unit,

the conductive film includes a first conductive film and a second conductive film,

the first conductive film is a light-shielding film formed in the light-shielding unit,

the peripheral circuit unit includes:

a line formed in the first insulating film; and

a pad electrode which is formed on the line and is electrically connected to the line, and

the second conductive film is the pad electrode.

10. The solid-state imaging device according to claim 1 ,

wherein in the area outside of the pixel unit, a portion of the third insulating film formed on the second insulating film near the conductive film has a film thickness smaller than a film thickness of the partition, the portion being formed around the conductive film.

11. The solid-state imaging device according to claim 1 , further comprising

a fourth insulating film between the second insulating film and the third insulating film,

wherein the conductive film is formed on the fourth insulating film, and

in the pixel unit, each of the color filters is formed to penetrate the third insulating film and the fourth insulating film.

12. The solid-state imaging device according to claim 1 ,

wherein the conductive film is a single layer film including aluminum.

13. The solid-state imaging device according to claim 1 ,

wherein the conductive film is a stacked film which includes at least a film including aluminum.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0870 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2014
From: YANO, HISASHI; SUZUKI, SHIGERU; OKAZAKI, GEN; OODAIRA, AKIRA; KATSUNO, MOTONARI; NAKAMURA, TETSUYA
To: PANASONIC CORPORATION
Reel/Frame 033181/0230 →