Configurable IC having a routing fabric with storage elements
View Patent ↗Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC.
1. A method for routing signals in an integrated circuit (IC) that comprises a plurality of configurable circuit interconnected by a routing fabric, the method comprising:
transmitting a first signal from a first configurable circuit of the IC to a second configurable circuit of the IC by using a particular path of the routing fabric that connects the first circuit to the second circuit without an intervening signal storage element;
storing the first signal along the particular path; and
while storing said first signal along the particular path, passing a second signal from the first circuit to the second circuit along the particular path.
2. The method of claim 1 further comprising passing the first signal to the second circuit at a clock cycle subsequent to the passing of the second signal.
3. The method of claim 2 , wherein said clock cycle is a sub-cycle clock of a user defined clock.
4. The method of claim 1 further comprising receiving the first signal at an input of the first circuit from a feedback loop established with the particular path, wherein said receiving occurs while the second signal is passed to the second circuit.
5. The method of claim 4 , wherein the first signal is passed to the second circuit along the particular path.
6. The method of claim 5 , wherein said passing of the first signal occurs one clock cycle after passing the second signal.
7. The method of claim 5 , wherein said passing of the first signal occurs at least two clock cycles after passing said second signal to the second circuit.
8. The method of claim 1 , wherein said particular path comprises parallel paths directly connecting said first circuit to said second circuit, wherein a storage element for storing said first signal is located along one of said parallel paths.
9. A method for routing signals in an integrated circuit (IC) that comprises a plurality of configurable circuits interconnected by a routing fabric, the method comprising:
receiving a first signal at a storage element located along a particular path within the routing fabric, said particular path for connecting a first configurable circuit of the IC to a second configurable circuit of the IC without an intervening storage element;
storing said first signal at the storage element; and
transparently routing a second signal from the first circuit to the second circuit through the particular path while said storage element stores said first signal.
10. The method of claim 9 further comprising transparently routing the second signal from the first circuit to a third circuit through the routing fabric while said storage element stores said first signal.
11. The method of claim 9 further comprising routing the first signal from the storage element to the first circuit.
12. The method of claim 11 further comprising receiving the first signal at the storage element for routing to a third circuit.
13. The method of claim 9 , wherein storing the first signal comprises configurably storing the first signal based on configuration data received at the storage element.
14. The method of claim 9 , wherein said particular path comprises a plurality of parallel paths connecting said first circuit to said second circuit, wherein said storage element is located along one of said parallel paths.
15. The method of claim 9 , wherein the first circuit is a logic circuit for producing a logic output and said first signal is a first output of the logic circuit and said second signal is a second output of the logic circuit.
16. The method of claim 9 , wherein the first circuit is an interconnect circuit for routing signals from at least two different circuits of the IC to said second circuit.