IP Library Granted Patent US 9,477,624
Granted Patent B2
US 9,477,624 · App. 14/248,463 · Granted Oct 25, 2016

Controlling bus access in a real-time computer system

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Quick Facts
Patent No.
US 9,477,624
App. No.
14/248,463
Granted
Oct 25, 2016
Kind
B2
Abstract

In a real-time application, one or more computational tasks execute according to a time schedule and use input data from input devices and/or output data from output devices. One or more of the input devices or output devices may be unscheduled devices that attempt to access the peripheral bus at unscheduled times. Such unscheduled bus access can cause the time schedule to become comprised. Various methods for arbitrating access to the bus to better integrate the bus access with the time schedule followed by the application are described.

Claims (55)

1. A non-transitory computer-readable memory medium storing program instructions executable by one or more processors to:

execute, in response to an application being launched, one or more software tasks scheduled according to a static time schedule defined for the application, wherein the static time schedule defines specific execution start times for the one or more software tasks, wherein one or more unscheduled devices attempt to access a bus at times not defined by the static time schedule, wherein the static time schedule defines specific times when bus access for the one or more unscheduled devices is allowed and specific times when bus access for the one or more unscheduled devices is not allowed; and

allowing and not allowing bus access for the one or more unscheduled devices at the specific times defined by the static time schedule.

2. The non-transitory computer-readable memory medium of claim 1 ,

wherein the static time schedule specifies that bus access for the one or more unscheduled devices should be allowed at each of the execution start times for the one or more software tasks.

3. The non-transitory computer-readable memory medium of claim 2 ,

wherein the static time schedule also defines specific execution completion times for the one or more software tasks; and

wherein the static time schedule specifies that bus access for the one or more unscheduled devices should not be allowed at each of the execution completion times for the one or more software tasks.

4. The non-transitory computer-readable memory medium of claim 2 ,

wherein in addition to the execution start times for the one or more software tasks, the static time schedule also specifies that bus access for the one or more unscheduled devices should be allowed at one or more other specific times.

5. The non-transitory computer-readable memory medium of claim 1 , wherein the program instructions are further executable by the one or more processors to:

create the static time schedule in response to user input, wherein to create the static time schedule, the program instructions are executable by the one or more processors to:

receive user input specifying the specific times for the bus access for the one or more unscheduled devices to be allowed and not allowed.

6. The non-transitory computer-readable memory medium of claim 5 ,

wherein the static time schedule is divided into time periods; and

wherein to receive the user input specifying the specific times for the bus access for the one or more unscheduled devices to be allowed and not allowed, the program instructions are executable by the one or more processors to:

receive user input specifying one or more time offsets indicating when the bus access for the one or more unscheduled devices should be allowed relative to a beginning of a time period; and

for each of the time offsets, receive user input specifying a length of time for the bus access for the one or more unscheduled devices to remain allowed.

7. A method comprising:

executing, in response to an application being launched, one or more software tasks according to a static time schedule defined for the application, wherein the static time schedule defines specific execution start times for the one or more software tasks, wherein one or more unscheduled devices attempt to access a bus at times not defined by the static time schedule, wherein the static time schedule defines specific times when bus access for the one or more unscheduled devices is allowed and specific times for bus access for the one or more unscheduled devices is not allowed; and

allowing and not allowing the bus access for the one or more unscheduled devices at the specific times defined by the static time schedule.

8. The method of claim 7 ,

wherein the static time schedule specifies that bus access for the one or more unscheduled devices should be allowed at each of the execution start times for the one or more software tasks.

9. The method of claim 8 ,

wherein the static time schedule also defines specific execution completion times for the one or more software tasks; and

wherein the static time schedule specifies that bus access for the one or more unscheduled devices should not be allowed at each of the execution completion times for the one or more software tasks.

10. The method of claim 8 ,

wherein in addition to the execution start times for the one or more software tasks, the static time schedule also specifies that bus access for the one or more unscheduled devices should be allowed at one or more other specific times.

11. The method of claim 7 , further comprising:

creating the static time schedule in response to user input, wherein creating the static time schedule comprises receiving user input specifying the specific times for the bus access for the one or more unscheduled devices to be allowed and not allowed.

12. The method of claim 11 ,

wherein the static time schedule is divided into time periods; and

wherein said receiving the user input specifying the specific times for the bus access for the one or more unscheduled devices to be allowed and not allowed comprises:

receiving user input specifying one or more time offsets indicating when the bus access for the one or more unscheduled devices should be allowed relative to a beginning of a time period; and

for each of the time offsets, receiving user input specifying a length of time for the bus access for the one or more unscheduled devices to remain allowed.

13. A system, comprising:

one or more processors; and

a memory medium, coupled to the one or more processors, wherein the memory medium stores program instructions executable by the one or more processors to:

execute, in response to an application being launched, one or more software tasks according to a static time schedule defined for the application, wherein the static time schedule defines specific execution start times for the one or more software tasks, wherein one or more unscheduled devices attempt to access a bus at times not defined by the static time schedule, wherein the static time schedule defines specific times when bus access for the one or more unscheduled devices is allowed and specific times for bus access for the one or more unscheduled devices is not allowed; and

turn on and off the bus access for the one or more unscheduled devices at the specific times defined by the static time schedule.

14. The system of claim 13 ,

wherein the static time schedule specifies that bus access for the one or more unscheduled devices should be allowed at each of the execution start times for the one or more software tasks.

15. The system of claim 14 ,

wherein the static time schedule also defines specific execution completion times for the one or more software tasks; and

wherein the static time schedule specifies that bus access for the one or more unscheduled devices should not be allowed at each of the execution completion times for the one or more software tasks.

16. The system of claim 14 ,

wherein in addition to the execution start times for the one or more software tasks, the static time schedule also specifies that bus access for the one or more unscheduled devices should be allowed at one or more other specific times.

17. The system of claim 13 , wherein the program instructions are further executable by the one or more processors to:

create the static time schedule in response to user input, wherein to create the static time schedule, the program instructions are executable by the one or more processors to:

receive user input specifying the specific times for the bus access for the one or more unscheduled devices to be allowed and not allowed.

18. The system of claim 17 ,

wherein the static time schedule is divided into time periods; and

wherein to receive the user input specifying the specific times for the bus access for the one or more unscheduled devices to be allowed and not allowed, the program instructions are further executable by the one or more processors to:

receive user input specifying one or more time offsets indicating when the bus access for the one or more unscheduled devices should be allowed relative to a beginning of a time period; and

for each of the time offsets, receive user input specifying a length of time for the bus access for the one or more unscheduled devices to remain allowed.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 057280/0028) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 065231/0466 →
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 052935/0001) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
Reel/Frame 065653/0463 →
SECURITY INTEREST Recorded Jun 18, 2021
From: NATIONAL INSTRUMENTS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 057280/0028 →
SECURITY INTEREST Recorded Jun 14, 2020
From: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 052935/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2014
From: CHANDHOKE, SUNDEEP
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 032633/0250 →