IP Library Granted Patent US 9,547,522
Granted Patent B2
US 9,547,522 · App. 14/249,947 · Granted Jan 17, 2017

Method and system for reconfigurable virtual single processor programming model

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Quick Facts
Patent No.
US 9,547,522
App. No.
14/249,947
Granted
Jan 17, 2017
Kind
B2
Abstract

A non-transitory computer-readable storage medium storing a set of instructions that are executable by a processor. The set of instructions, when executed by one or more processors of a multi-processor computing system, causes the one or more processors to perform operations including initiating a first processor of the multi-processor computing system with an operating system image of an operating system, the operating system image including a predetermined object map, initiating a second processor of the multi-processor computing system with the operating system image, placing a plurality of system objects with corresponding processors according to the predetermined object map, receiving a triggering event causing a change to the predetermined object map and relocating one of the system objects to a different one of the processors based on the change to the predetermined object map.

Claims (34)

1. A non-transitory computer-readable storage medium storing a set of instructions that are executable by a processor, the set of instructions, when executed by one or more processors of a multi-processor computing system, causing the one or more processors to perform operations comprising:

initiating a first processor of the multi-processor computing system with an operating system image of an operating system, the operating system image including a plurality of predetermined object maps;

initiating a second processor of the multi-processor computing system with the operating system image;

placing a plurality of system objects on corresponding processors according to a first predetermined object map;

receiving a triggering event causing a change to one or more of the processors;

invoking a second predetermined object map based on current operating conditions of the multi-processor computing system; and

relocating one or more of the system objects to a different one of the processors according to the second predetermined object map.

2. The non-transitory computer-readable storage medium of claim 1 , wherein the multi-processor computing system comprises a tightly-coupled shared memory computing system.

3. The non-transitory computer-readable storage medium of claim 1 , wherein the plurality of predetermined object maps comprise one of system object locations and task locations.

4. The non-transitory computer-readable storage medium of claim 1 , wherein the triggering event comprises one of on-lining and off-lining one of the processors.

5. The non-transitory computer-readable storage medium of claim 4 , wherein one of the predetermined object maps comprises distributing system objects evenly among the plurality of processors that are on-line after the one of on-lining and off-lining.

6. The non-transitory computer-readable storage medium of claim 1 , wherein the triggering event comprises receiving an indication from an executing application.

7. The non-transitory computer-readable storage medium of claim 1 , wherein the current operating conditions are defined by a subset of the plurality of processors that are currently available.

8. The non-transitory computer-readable storage medium of claim 1 , wherein the operating system is a microkernel operating system.

9. The non-transitory computer-readable storage medium of claim 1 , wherein the operating system comprises a shared memory-based messaging interface providing communications among the plurality of processors.

10. A system, comprising:

a plurality of processors; and

a memory shared by the plurality of processors, the memory storing an operating system image, the operating system image including a plurality of predetermined object maps placing a plurality of system objects on corresponding processors according to a first predetermined object map,

wherein the system is initiated by initiating a first processor of the plurality of processors with the operating system image and initiating a second processor of the plurality of processors with the operating system image, and

wherein a kernel of the system receives a triggering event causing a change to one or more of the processors, invokes a second predetermined object map based on current operating conditions of the system, and relocates one or more of the system objects to a different one of the processors according to the second predetermined object map.

11. The system of claim 10 , wherein the plurality of predetermined object maps comprise one of system object locations and task locations.

12. The system of claim 10 , wherein the triggering event comprises one of on-lining and off-lining one of the plurality of processors.

13. The system of claim 12 , wherein one of the predetermined object maps comprises distributing system objects evenly among the plurality of processors that are on-line after the one of on-lining and off-lining.

14. The system of claim 10 , wherein the triggering event comprises receiving an indication from an executing application.

15. The system of claim 10 , wherein the current operating conditions are defined by a subset of the plurality of processors that are currently available.

16. The system of claim 10 , wherein the operating system is a microkernel operating system.

17. The system of claim 10 , wherein the operating system comprises a shared memory-based messaging interface providing communications among the plurality of processors.

18. A method, comprising:

initiating a first processor of a multi-processor computing system with an operating system image of an operating system, the operating system image including a plurality of predetermined object maps;

initiating a second processor of the multi-processor computing system with the operating system image;

placing a plurality of system objects on corresponding processors according to a first predetermined object map;

receiving a triggering event causing a change to one or more of the processors;

invoking a second predetermined object map based on current operating conditions of the multi-processor computing system; and

relocating one or more of the system objects to a different one of the processors according to the second predetermined object map.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Dec 28, 2022
From: GUGGENHEIM CORPORATE FUNDING, LLC
To: WIND RIVER SYSTEMS, INC.
Reel/Frame 062239/0590 →
PATENT SECURITY AGREEMENT Recorded Dec 24, 2018
From: WIND RIVER SYSTEMS, INC.
To: GUGGENHEIM CORPORATE FUNDING, LLC
Reel/Frame 049148/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2014
From: GAIARSA, ANDREW
To: WIND RIVER SYSTEMS, INC.
Reel/Frame 032649/0803 →