IP Library Granted Patent US 9,578,142
Granted Patent B2
US 9,578,142 · App. 14/250,157 · Granted Feb 21, 2017

System and method for improving resilience in transmission of data fragments

Inventors: Paul Bright Thomas (Wokingham, GB); Thomas Davies (Guildford, GB); Mohamed Kamel Zanaty (Cary, NC)
Assignee: Cisco Technology, Inc.
H04L69/22
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Quick Facts
Patent No.
US 9,578,142
App. No.
14/250,157
Granted
Feb 21, 2017
Kind
B2
Abstract

A system and method packetizes data by fragmenting, with processing circuitry, a data structure into a plurality of data fragments, each data fragment being included in a separate packet, and inserting, with processing circuitry, an offset indicator within each of the packets, each offset indicator indicating an amount of fragment data encapsulated within preceding packets. A system and method decodes packetized data that includes the offset indicator.

Claims (54)

1. A method of decoding packetized data, the method comprising:

receiving, with processing circuitry, a plurality of packets using real-time transport protocol, each packet of the plurality of packets including a data fragment of a data structure, and each packet of the plurality of packets including an offset indicator that indicates a number of bits or bytes of fragment data encapsulated within preceding packets;

determining a fragment size for the data fragment for at least one of the received packets;

extracting the offset indicators for the received packets;

reassembling, with processing circuitry, the data fragments of the received packets into a reassembled data structure;

decoding, with processing circuitry, the reassembled data structure based on the offset indicators of the received packets and the fragment size for at least one of the received packets; and

determining a missing packet in the plurality of packets using real-time transport protocol based on the reassembled data structure.

2. The method according to claim 1 , wherein in the receiving, the plurality of packets are received in a packet order and each offset indicator indicates the amount of fragment data encapsulated within preceding packets in the packet order.

3. The method according to claim 1 , wherein

each of the packets of the plurality of packets received in the receiving includes a header, and

the offset indicator of each packet is located within the header.

4. The method according to claim 1 , wherein

the plurality of packets received in the receiving further includes a plurality of tiles in a tile order, and

the data structure includes a structure header that includes the tile order and tile offset entry points within the data structure.

5. The method according to claim 4 , wherein the decoding includes:

extracting the offset indicator of a prior packet, O p , and the offset indicator of a next packet, O n , the prior packet and the next packet being packets received in the receiving, the prior packet being a packet immediately before the missing packet in the packet order, and the next packet being a packet immediately after the missing packet in the packet order;

determining a prior packet data size, D p ;

determining a missing data size, D m , where D m =O n −(O p +D p );

identifying whole tiles in the packets received in the receiving; and

decoding the identified whole tiles based on the offset indicators of the received packets, the missing data size, P m , and the title entry points of the structure header.

6. The method according to claim 1 , wherein

each packet of the received packets is a real-time transport protocol (RTP) payload packet, and

each header field is an RTP payload packet header.

7. A method of decoding packetized data, the method comprising:

receiving, with processing circuitry, a plurality of packets, each packet of the plurality of packets including a data fragment of a data structure, and each packet of the plurality of packets including an offset indicator that indicates an amount of fragment data encapsulated within preceding packets;

reassembling, with processing circuitry, the data fragments of the received packets into a reassembled data structure; and

decoding, with processing circuitry, the reassembled data structure based on the offset indicators of the received packets, wherein the decoding includes:

determining whether a packet was not received, the packet being a missing packet;

extracting the offset indicator of a prior packet, O p , and the offset indicator of a next packet, O n , the prior packet and the next packet being packets received in the receiving, the prior packet being a packet immediately before the missing packet in the packet order, and the next packet being a packet immediately after the missing packet in the packet order;

determining a prior packet data size, D p ; and

determining a missing data size, D m , where D m =O n −(O p +D p ).

8. A processor, comprising circuitry configured to:

receive a plurality of packets, each packet of the plurality of packets including a data fragment of a data structure, and each packet of the plurality of packets including an offset indicator that indicates quantity of fragment data encapsulated within preceding packets;

reassemble the data fragments of the received packets into a reassembled data structure;

decode the reassembled data structure based on the offset indicators of the received packets;

wherein the circuitry is further configured to receive the plurality of packets in a packet order,

wherein each offset indicator indicates the amount of fragment data encapsulated within preceding packets in the packet order; and

extract the offset indicator of a first packet, O p , and the offset indicator of a third packet, O n , the first packet and the third packet being packets received in the receiving, the first packet being a packet before a second packet in the packet order, and the third packet being a packet after the second packet in the packet order;

determine a first packet data size, D p ; and

determine a second data size, D m , where D m =O n −(O p +D p ).

9. The processor according to claim 8 , wherein

each of the packets of the plurality of packets received by the circuitry includes a header, and

the offset indicator of each packet is located within the header.

10. The processor according to claim 8 , wherein

the plurality of packets received by the circuitry further includes a plurality of tiles in a tile order, and

the data structure includes a structure header that includes the tile order and tile offset entry points within the data structure.

11. An apparatus comprising:

a processor, comprising circuitry configured to:

receive a plurality of packets using real-time transport protocol, each packet of the plurality of packets including a data fragment of a data structure, and each packet of the plurality of packets including an offset indicator that indicates a number of bits or bytes of fragment data encapsulated within preceding packets;

determine a fragment size for the data fragment for at least one of the received packets;

extract the offset indicators for the received packets;

reassemble the data fragments of the received packets into a reassembled data structure;

decode the reassembled data structure based on the offset indicators of the received packets and the fragment size for at least one of the received packets; and

determine a missing packet in the plurality of packets using real-time transport protocol based on the reassembled data structure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2014
From: THOMAS, PAUL BRIGHT; DAVIES, THOMAS; ZANATY, MOHAMED KAMEL
To: CISCO TECHNOLOGY, INC.
Reel/Frame 032653/0343 →
Continuity (2)
Provisional Application 61841762 · Jul 1, 2013
Related Publication 20150003474A1 · Jan 1, 2015