IP Library Granted Patent US 9,560,758
Granted Patent B2
US 9,560,758 · App. 14/250,211 · Granted Jan 31, 2017

Uniform impedance circuit board

Inventors: Shoji Matsumoto (Yokohama, JP); Seiji Hayashi (Yokohama, JP); Takuya Kondo (Chigasaki, JP)
Assignee: Canon Kabushiki Kaisha
H05K1/115H05K1/0251H05K2201/096H05K2201/0979H05K2201/10545
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Quick Facts
Patent No.
US 9,560,758
App. No.
14/250,211
Granted
Jan 31, 2017
Kind
B2
Abstract

A printed wiring board includes a first conductive layer, a second conductive layer arranged at a gap with respective to the first conductive layer, a third conductive layer, a first via conductor and a second via conductor, and a third signal wiring pattern. A first signal wiring pattern is arranged on the first conductive layer, a second signal wiring pattern is arranged on the second conductive layer, and a third signal wiring pattern that is arranged on the third conductive layer. The third conductive layer is arranged between the first conductive layer and the second conductive layer via an insulating layer. The first via conductor and the second via conductor, which are arranged to be mutually adjacent, connect the first signal wiring pattern to the second signal wiring pattern. The third signal wiring pattern connects the first via conductor to the second via conductor.

Claims (30)

1. A printed wiring board comprising:

a first via conductor and a second via conductor arranged relative to, and adjacent to, each other;

a first conductive layer on which a first signal wiring pattern having a first connecting conductor pattern is arranged;

a second conductive layer on which a second signal wiring pattern having a second connecting conductor pattern is arranged, wherein the first via conductor and the second via conductor connect the first signal wiring pattern to the second signal wiring pattern;

a third conductive layer on which a third signal wiring pattern having a third connecting conductor pattern is arranged, wherein the third connecting conductor pattern is connected to the first via conductor and the second via conductor, and wherein the third conductive layer is arranged between the first conductive layer and the second conductive layer via an insulating layer; and

a signal transmission line that includes the first via conductor, the second via conductor, the first signal wiring pattern, the second signal wiring pattern, and the third signal wiring pattern.

2. The printed wiring board according to claim 1 ,

wherein the first signal wiring pattern includes a first via pad connected to the first via conductor and a second via pad connected to the second via conductor, wherein the first connecting conductor pattern connects the first via pad to the second via pad,

wherein the second signal wiring pattern includes a third via pad connected to the first via conductor, and a fourth via pad connected to the second via conductor, wherein the second connecting conductor pattern connects the third via pad to the fourth via pad, and

wherein the third signal wiring pattern includes a fifth via pad connected to the first via conductor and a sixth via pad connected to the second via conductor, wherein the third connecting conductor pattern connects the fifth via pad to the sixth via pad.

3. The printed wiring board according to claim 2 , wherein the first connecting conductor pattern, the second connecting conductor pattern, and the third connecting conductor pattern are arranged on a same line in a plan view as viewed from a direction perpendicular to a mounting surface of the printed wiring board.

4. The printed wiring board according to claim 2 , wherein a wiring width of the third connecting conductor pattern is greater than or equal to a diameter of the first via conductor and the second via conductor and also less than or equal to a diameter of the fifth via pad and the sixth via pad.

5. The printed wiring board according to claim 2 ,

wherein a wiring width of the first connecting conductor pattern is greater than or equal to a diameter of the first via conductor and the second via conductor and also is less than or equal to a diameter of the first via pad and the second via pad, and

wherein a wiring width of the second connecting conductor pattern is greater than or equal to a diameter of the first via conductor and the second via conductor and also is less than or equal to a diameter of the third via pad and the fourth via pad.

6. The printed wiring board according to claim 1 , wherein a plurality of third conductive layers are arranged between the first conductive layer and the second conductive layer via the insulating layer, and third signal wiring patterns are arranged so as to correspond to respective third conductive layers.

7. The printed wiring board according to claim 1 , wherein a pitch between the first via conductor and the second via conductor is less than or equal to a thickness from the first conductive layer to the second conductive layer.

8. The printed wiring board according to claim 1 , wherein, among a pair of surface layers, the first conductive layer is one surface layer, and the second conductive layer is the other surface layer.

9. The printed wiring board according to claim 1 , wherein the first conductive layer and the second conductive layer are inner layers of the printed wiring board, and the first conductive layer is connected to one surface layer among a pair of surface layers via a third via conductor, and the second conductive layer is connected to the other surface layer via a fourth via conductor.

10. A printed circuit board comprising:

the printed wiring board according to claim 1 ;

a transmitting circuit that is mounted on the printed wiring board and configured to transmit a signal; and

a receiving circuit that is mounted on the printed wiring board and configured to receive the signal transmitted by the transmitting circuit.

11. The printed wiring board according to claim 1 , wherein the third connecting conductor pattern is positioned in between the first connecting conductor pattern and the second connecting conductor pattern to suppress impedance mismatch of the signal transmission line.

12. The printed wiring board according to claim 1 , wherein the third connecting conductor pattern is positioned in line with the first connecting conductor pattern and the second connecting conductor pattern to suppress impedance mismatch of the signal transmission line.

13. The printed wiring board according to claim 1 , wherein the third connecting conductor pattern is positioned relative the first connecting conductor pattern and the second connecting conductor pattern to cause capacitive coupling between the first signal wiring pattern, the second signal wiring pattern, and the third signal wiring pattern to suppress impedance mismatch of the signal transmission line.

14. The printed wiring board according to claim 1 , wherein the first via conductor and the second via conductor arranged in parallel and at an interval relative to each other.

15. The printed wiring board according to claim 1 , wherein the third connecting conductor pattern connects the first via conductor to the second via conductor.

16. The printed wiring board according to claim 1 , wherein the first connecting conductor pattern, the second connecting conductor pattern, and the third connecting conductor pattern connect the first via conductor to the second via conductor, each along a shortest route between the first via conductor to the second via conductor.

17. An electronic equipment comprising the printed wiring board according to claim 1 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2014
From: MATSUMOTO, SHOJI; HAYASHI, SEIJI; KONDO, TAKUYA
To: CANON KABUSHIKI KAISHA
Reel/Frame 033451/0317 →
Priority Claims (2)
JP 2013-084540 · Apr 15, 2013 · national
JP 2014-040405 · Mar 3, 2014 · national
Continuity (1)
Related Publication 20140305688A1 · Oct 16, 2014