IP Library Granted Patent US 9,471,500
Granted Patent B2
US 9,471,500 · App. 14/251,288 · Granted Oct 18, 2016

Bucketized multi-index low-memory data structures

Inventors: Erik Kruus (Hillsborough, NJ); Cristian Ungureanu (Princeton, NJ); Wen Xia (Princeton, NJ)
Assignee: NEC Corporation
G06F12/0871
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Quick Facts
Patent No.
US 9,471,500
App. No.
14/251,288
Granted
Oct 18, 2016
Kind
B2
Abstract

Systems and methods for generating and storing a data structure for maintaining cache supporting compression and cache-wide deduplication, including generating data structures with fixed size memory regions configured to hold multiple signatures as keys, wherein the number of the fixed size memory regions is bounded. A first mapping is generated from short-length signatures to a storage location and a quantized length measure on a cache storage device; and unused contiguous regions on the cache device are allocated. Metadata and cache page content is retrieved using a single input/output operation; a correctness of a full value of hash functions of uncompressed cache page content is validated; a second mapping is generated from short-length signatures to entries in the first mapping; and verification of whether the cached page content corresponds to a full-length original logical block address using the metadata is performed.

Claims (25)

1. A method for generating and storing a data structure for maintaining a cache supporting compression and a cache-wide deduplication, comprising:

generating data structures with fixed size memory regions configured to hold multiple signatures as keys, wherein the number of the fixed size memory regions is bounded;

generating a first mapping from short-length signatures to a storage location and a quantized length measure on a cache storage device;

retrieving metadata and cache page content using a single input/output operation;

validating a correctness of a full value of one or more hash functions of uncompressed cache page content using the metadata;

generating a second mapping from the short-length signatures to entries in the first mapping, wherein one or more pointers to the entries in the first mapping are stored in a non-transitory computer readable storage medium,

wherein the first and second mappings are statically sized, relative to memory allocated and a number of contents, d-left hash tables with zero internal pointer overhead, wherein the statically sized d-left hash tables are never resized or reallocated; and

verifying whether the cached page content corresponds to a full-length original logical block address (LBA) using the metadata.

2. The method as recited in claim 1 , wherein the storage location information and the quantized length measure information is stored in a compressed format.

3. The method as recited in claim 1 , wherein the cache page content is stored in a compressed format.

4. The method as recited in claim 1 , wherein unused contiguous regions on the cache device of a predetermined length are allocated.

5. The method as recited in claim 1 , wherein the pointer to the entries in the first mapping is stored with a lower number of bits than a memory pointer.

6. The method as recited in claim 5 , wherein a bounded-length search is employed to locate a matching entry.

7. A system for generating and storing a data structure for maintaining a cache supporting compression and a cache-wide deduplication, comprising:

one or more data structures with fixed size memory regions configured to hold multiple signatures as keys, wherein the number of the fixed size memory regions is bounded;

a mapping generator configured to generate a first mapping from short-length signatures to a storage location and a quantized length measure on a cache storage device, and to generate a second mapping from the short-length signatures to entries in the first mapping, wherein one or more pointers to the entries in the first mapping are stored,

wherein the first and second mappings are statically sized, relative to memory allocated and a number of contents, d-left hash tables with zero internal pointer overhead, wherein the statically sized d-left hash tables are never resized or reallocated;

a content retrieval module configured to retrieve metadata and cache page content using a single input/output operation;

a validation module configured to validate a correctness of a full value of one or more hash functions of uncompressed cache page content using the metadata; and

a verification module configured to verify whether the cached page content corresponds to a full-length original logical block address (LBA) using the metadata.

8. The system as recited in claim 7 , wherein the storage location information and the quantized length measure information is stored in a compressed format.

9. The system as recited in claim 7 , wherein the cache page content is stored in a compressed format.

10. The system as recited in claim 7 , wherein unused contiguous regions on the cache device of a predetermined length are allocated.

11. The system as recited in claim 7 , wherein the pointer to the entries in the first mapping is stored with a lower number of bits than a memory pointer.

12. The system as recited in claim 11 , wherein a bounded-length search is employed to locate a matching entry.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2016
From: NEC LABORATORIES AMERICA, INC.
To: NEC CORPORATION
Reel/Frame 039756/0376 →
Continuity (3)
Provisional Application 61811271 · Apr 12, 2013
Provisional Application 61811276 · Apr 12, 2013
Related Publication 20140310476A1 · Oct 16, 2014