IP Library Granted Patent US 9,531,843
Granted Patent B1
US 9,531,843 · App. 14/252,772 · Granted Dec 27, 2016

Channel coding optimized for low-latency data

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Quick Facts
Patent No.
US 9,531,843
App. No.
14/252,772
Granted
Dec 27, 2016
Kind
B1
Abstract

An encoding system encodes 8-bit data and control characters into 10-bit symbols. The 10-bit symbols have odd parity such that a single bit error results in an illegal code. Each 8-bit character maps either to a 10-bit symbol with balanced disparity or a pair of 10-bit symbols that collectively have balanced disparity. By periodically inserting an idle character that includes a run of seven consecutive like bits, a 1 MHz pilot tone is embedded in the data stream. The boundary of 10-bit symbols can be identified by locating a run of seven consecutive characters. 10-bit control symbols corresponding to 8-bit control characters are transmitted without reducing the bandwidth available for data transmission by replacing some or all of the preamble or idle portions of an Ethernet packet with the 10-bit control symbols.

Claims (57)

1. A system for encoding data, the system comprising:

an input module configured to receive at least one 8-bit data character to be encoded;

a storage medium storing a set of encoding mappings between 8-bit characters and corresponding 10-bit symbols, the 10-bit symbols in the set of encoding mappings configured such that no 10-bit symbol that corresponds to an 8-bit data character begins or ends with a run of four or more like bits, the mappings including a first mapping and a second mapping, the first mapping between a first 8-bit data character and a 10-bit symbol having balanced disparity, and the second mapping between a second 8-bit data character and a pair of 10-bit symbols that individually have imbalanced disparity but collectively have balanced disparity, wherein a first 10-bit symbol of the pair has a disparity of +4 and a second 10-bit symbol of the pair has a disparity of −4;

an encoding module, communicatively coupled to the input module and the storage medium, the encoding module configured to encode the at least one data character into corresponding 10-bit symbols using the set of encoding mappings; and

a transmitter configured to transmit the 10-bit symbols in a data stream.

2. The system of claim 1 , wherein the pair of 10-bit symbols are binary complements of each other.

3. The system of claim 1 , wherein the 10-bit symbols in the set of encoding mappings are configured such that no 10-bit symbol that corresponds to an 8-bit data character includes a run of seven or more consecutive like bits.

4. The system of claim 1 , wherein:

the input module further configured to receive at least one 8-bit control character to be encoded;

the set of encoding mappings further including a third mapping between a first 8-bit control character and at least one 10-bit symbol; and

the encoding module is further configured to encode the at least one control character into corresponding 10-bit symbols using the set of encoding mappings.

5. The system of claim 4 ,

wherein the input module is further configured to receive an indication of which received characters are 8-bit data characters and which are 8-bit control characters, and

wherein the encoding module is further configured to encode the at least one 8-bit data character and the at least one 8-bit control character into corresponding 10-bit symbols based on the indication.

6. The system of claim 4 , wherein the second pair of 10-bit symbols are not binary complements of each other, the second pair mapping to a check inversion 8-bit control character used to determine inversion of the data stream at a receiver.

7. The system of claim 4 , wherein the second pair of 10-bit symbols among the 10-bit symbols in each including a run of seven consecutive like bits, the run of seven consecutive like bits enabling detection of a boundary between adjacent 10-bit symbols in the data stream.

8. The system of claim 1 , wherein:

the input module further configured to receive an 8-bit control character to be encoded;

the set of encoding mappings further including a third mapping between the 8-bit control character and a pair of 10-bit symbols; and

the encoding module is further configured to encode the 8-bit control character into the pair of 10-bit symbols using the set of encoding mappings.

9. The system of claim 1 , wherein the input module is further configured to replace a non-data portion of a packet to be transmitted with an 8-bit control character, the set of encoding mappings comprising a third mapping between the 8-bit control character and one or more 10-bit symbols.

10. The system of claim 9 , wherein the non-data portion of the packet that is replaced is a preamble portion or an idle portion of the packet.

11. The system of claim 1 , wherein,

the set of encoding mappings includes a plurality of mappings between 8-bit characters and pairs of corresponding 10-bit symbols, the pairs each including a primary encoding and an alternate encoding that collectively have balanced disparity; and

wherein the encoding module is further configured to alternate between using primary and alternate encodings such that a magnitude of a total disparity of the data stream does not exceed four.

12. A non-transitory computer-readable storage medium storing computer executable code for encoding data, the computer executable code comprising instructions for:

receiving at least one data character to be encoded;

accessing a set of encoding mappings between 8-bit characters and corresponding 10-bit symbols, the 10-bit symbols in the set of encoding mappings configured such that no 10-bit symbol that corresponds to an 8-bit data character begins or ends with a run of four or more like bits, the mappings including a first mapping and a second mapping, the first mapping between a first 8-bit data character and a 10-bit symbol having balanced disparity, and the second mapping between a second 8-bit data character and a pair of 10-bit symbols that individually have imbalanced disparity but collectively have balanced disparity, wherein a first 10-bit symbol of the pair has a disparity of +4 and a second 10-bit symbol of the pair has a disparity of −4; and

encoding the at least one data character into corresponding 10-bit symbols using the set of encoding mappings; and

transmitting the 10-bit symbols in a data stream.

13. The non-transitory computer-readable storage medium of claim 12 ,

wherein the set of mappings further includes a third mapping between a first 8-bit control character and a second pair of 10-bit symbols that individually have imbalanced disparity but collectively have balanced disparity, and

wherein the computer executable code further comprises instructions for:

receiving at least one control character to be encoded; and

encoding the at least one control character into corresponding 10-bit symbols according to the set of mappings.

14. The non-transitory computer-readable storage medium of claim 13 , wherein the computer executable code further comprises instructions for:

receiving an indication of which 8-bit characters are data characters and which are control characters, the encoding of the at least one data character and the at least one control character into corresponding 10-bit symbols being based on the indication.

15. The non-transitory computer-readable storage medium of claim 13 , wherein the second pair of 10-bit symbols are not binary complements of each other, the second pair configured to enable a receiver to determine if the data stream is inverted.

16. The non-transitory computer-readable storage medium of claim 13 , wherein the second pair of 10-bit symbols among the 10-bit symbols in each including a run of seven consecutive like bits, the run of seven consecutive like bits enabling detection of a boundary between adjacent 10-bit symbols in the data stream.

17. The non-transitory computer-readable storage medium of claim 12 , wherein the computer executable code further comprises instructions for:

replacing a non-data portion of a packet to be transmitted with an 8-bit control character, the set of encoding mappings comprising a third mapping between the 8-bit control character and one or more 10-bit symbols.

18. A method of encoding data, the method comprising:

receiving at least one data character to be encoded;

accessing a set of encoding mappings between 8-bit characters and corresponding 10-bit symbols, the 10-bit symbols in the set of encoding mappings configured such that no 10-bit symbol that corresponds to an 8-bit data character begins or ends with a run of four or more like bits, the mappings including a first mapping and a second mapping, the first mapping between a first 8-bit data character and a 10-bit symbol having balanced disparity, and the second mapping between a second 8-bit data character and a pair of 10-bit symbols that individually have imbalanced disparity but collectively have balanced disparity, wherein a first 10-bit symbol of the pair has a disparity of +4 and a second 10-bit symbol of the pair has a disparity of −4; and

encoding the at least one data character into corresponding 10-bit symbols using the set of encoding mappings; and

transmitting the 10-bit symbols in a data stream.

19. The method of claim 18 ,

wherein the set of mappings further includes a third mapping between a first 8-bit control character and a second pair of 10-bit symbols that individually have imbalanced disparity but collectively have balanced disparity, and

wherein the method further comprises:

receiving at least one control character to be encoded; and

encoding the at least one control character into corresponding 10-bit symbols according to the set of mappings.

20. The method of claim 19 , wherein the method further comprises:

receiving an indication of which 8-bit characters are data characters and which are control characters, the encoding of the at least one data character and the at least one control character into corresponding 10-bit symbols being based on the indication.

21. The method of claim 19 , wherein the second pair of 10-bit symbols are not binary complements of each other, the second pair configured to enable a receiver to determine if the data stream is inverted.

22. The method of claim 19 , wherein the second pair of 10-bit symbols among the 10-bit symbols in each including a run of seven consecutive like bits, the run of seven consecutive like bits enabling detection of a boundary between adjacent 10-bit symbols in the data stream.

23. The method of claim 18 , wherein the method further comprises:

replacing a non-data portion of a packet to be transmitted with an 8-bit control character, the set of encoding mappings comprising a third mapping between the 8-bit control character and one or more 10-bit symbols.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2020
From: COLLINEAR NETWORKS, INC.
To: COLLINEAR NET (ASSIGNMENT FOR THE BENEFIT OF CREDITORS), LLC
Reel/Frame 054614/0183 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2020
From: COLLINEAR NET (ASSIGNMENT FOR THE BENEFIT OF CREDITORS), LLC
To: EOS DEFENSE SYSTEMS USA, INC.
Reel/Frame 054614/0518 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2016
From: AOPTIX TECHNOLOGIES, INC
To: AOPTIX (ASSIGNMENT FOR THE BENEFIT OF CREDITORS), LLC
Reel/Frame 040596/0395 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2016
From: AOPTIX (ASSIGNEMTN FOR THE BENEFIT OF THE CREDITORS), LLC
To: COLLINEAR NETWORKS, INC.
Reel/Frame 040326/0851 →
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2016
From: GOLD HILL CAPITOL 2008, LP
To: AOPTIX TECHNOLOGIES, INC
Reel/Frame 040326/0051 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 25, 2014
From: YOUNG, SCOTT ALAN; SAINT GEORGES, ERIC; AHSAN, AGHA
To: AOPTIX TECHNOLOGIES, INC.
Reel/Frame 034259/0807 →
SECURITY INTEREST Recorded Jun 27, 2014
From: AOPTIX TECHNOLOGIES, INC.
To: GOLD HILL CAPITAL 2008, LP
Reel/Frame 033247/0438 →
SECURITY INTEREST Recorded Jun 24, 2014
From: AOPTIX TECHNOLOGIES, INC.
To: SILICON VALLEY BANK
Reel/Frame 033225/0493 →