IP Library Granted Patent US 9,378,765
Granted Patent B2
US 9,378,765 · App. 14/261,333 · Granted Jun 28, 2016

Systems and methods for differential message scaling in a decoding process

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Quick Facts
Patent No.
US 9,378,765
App. No.
14/261,333
Granted
Jun 28, 2016
Kind
B2
Abstract

Systems and method relating generally to data processing, and more particularly to systems and methods for scaling messages in a data decoding circuit. In one embodiment, the systems and methods include applying a variable node algorithm, applying a check node algorithm, calculating a first number of errors, calculating a second number of errors, calculating a difference between the first and second number of errors, multiplying by scalar values to yield a scaled set of messages, and re-applying the variable node algorithm to the scaled set of messages.

Claims (55)

1. A data processing system, the data processing system comprising:

a data decoder circuit operable to:

apply a variable node algorithm to a data input to yield a first set of variable node to check node messages, and apply a check node algorithm to the first set of variable node to check node messages to yield a set of check node to variable node messages during a first iteration;

calculate a first number of errors remaining based upon a preceding set of variable node to check node messages, wherein the preceding set of variable node to check node messages precedes the first set of variable node to check node messages;

calculate a second number of errors based upon the first set of variable node to check node messages;

calculate a difference between the first and second number of errors;

multiply the set of check node to variable node messages by one or more scalar values to yield a scaled set of check node to variable node messages, the one or more scalar values being selected based at least in part on the calculated difference between the first and second number of errors; and

apply the variable node algorithm to the scaled set of check node to variable node messages to yield a second set of variable node to check node messages.

2. The data processing system of claim 1 , wherein all elements of the set of check node to variable node messages are multiplied by the same scalar value when the difference is greater than a threshold value.

3. The data processing system of claim 2 , wherein the threshold value is user programmable.

4. The data processing system of claim 1 , wherein the data decoder circuit is further operable to:

identify one or more check node to variable node messages associated with each of the calculated second number of errors; and

wherein multiplying the set of check node to variable node messages by the one or more scalar values includes multiplying each of the one or more check node to variable node messages associated with each of the calculated second number of errors by a first scalar value, and multiplying each of the other of the variable node messages by a second scalar value.

5. The data processing system of claim 4 , wherein at least one of the first scalar value and the second scalar value is user programmable.

6. The data processing system of claim 4 , wherein multiplying each of the one or more check node to variable node messages associated with each of the calculated second number of errors by the first scalar value, and multiplying each of the other of the variable node messages by the second scalar value is done when the difference is less than a threshold value; and wherein multiplying the set of check node to variable node messages by the one or more scalar values includes multiplying all elements of the set of check node to variable node messages are multiplied by the second scalar value when the difference is greater than the threshold value.

7. The data processing system of claim 6 , wherein the threshold value is user programmable.

8. The data processing system of claim 1 , wherein the data processing system is implemented as part of an integrated circuit.

9. The data processing system of claim 1 , wherein the data decoder circuit is a low density parity check decoder circuit.

10. The data processing system of claim 1 , wherein the data processing system is implemented as part of a device selected from a group consisting of: a solid state storage device, a hard disk drive, and a communication device.

11. The data processing system of claim 1 , wherein the data decoder circuit comprises:

a variable node processing circuit operable to apply the variable node algorithm to the data input to yield the first set of variable node to check node messages; and

a check node processing circuit operable to apply the check node algorithm to the first set of variable node to check node messages to yield the set of check node to variable node messages during the first iteration.

12. The data processing system of claim 11 , wherein the data decoder circuit further comprises:

a syndrome calculation circuit operable to calculate a syndrome value corresponding to the second number of errors calculated based upon the first set of variable node to check node messages;

a buffer circuit operable to store a syndrome value corresponding to the first number of errors remaining calculated based upon the preceding set of variable node to check node messages; and

a summation circuit operable to subtract the syndrome value corresponding to the second number of errors calculated from the syndrome value corresponding to the first number of errors remaining calculated.

13. The data processing system of claim 1 , wherein the data decoder circuit further comprises:

an array of multiplier circuits including one multiplier circuit for each of the check node to variable node messages in the set of check node to variable node messages, wherein each of the multiplier circuits in the array of multiplier circuits is individually programmable to receive a selected scalar value.

14. The data processing system of claim 1 , wherein the data processing system further comprises:

a data detector circuit operable to apply a data detection algorithm to a data set to yield a detected output, and wherein the data input is derived from the detected output.

15. A method for data processing, the method comprising:

applying a variable node algorithm to a data input by a variable node processing circuit to yield a first set of variable node to check node messages;

applying a check node algorithm to the first set of variable node to check node messages to yield a set of check node to variable node messages during a first iteration;

calculating a first number of errors remaining based upon a preceding set of variable node to check node messages, wherein the preceding set of variable node to check node messages precedes the first set of variable node to check node messages;

calculating a second number of errors based upon the first set of variable node to check node messages;

calculating a difference between the first and second number of errors;

multiplying the set of check node to variable node messages by one or more scalar values to yield a scaled set of check node to variable node messages, the one or more scalar values being selected based at least in part on the calculated difference between the first and second number of errors; and

re-applying the variable node algorithm to the scaled set of check node to variable node messages to yield a second set of variable node to check node messages.

16. The method of claim 15 , wherein all elements of the set of check node to variable node messages are multiplied by the same scalar value when the difference is greater than a threshold value.

17. The method of claim 15 , wherein the method further comprises:

identifying one or more check node to variable node messages associated with each of the calculated second number of errors based upon the first set of variable node to check node messages; and

wherein multiplying the set of check node to variable node messages by the one or more scalar values includes multiplying each of the one or more check node to variable node messages associated with each of the calculated second number of errors by a first scalar value, and multiplying each of the other of the variable node messages by a second scalar value.

18. The method of claim 17 , wherein the method further comprises:

programming at least one of the first scalar value and the second scalar value is user programmable.

19. The method of claim 17 , wherein multiplying each of the one or more check node to variable node messages associated with each of the calculated second number of errors by the first scalar value, and multiplying each of the other of the variable node messages by the second scalar value is done when the difference is less than a threshold value; and wherein multiplying the set of check node to variable node messages by the one or more scalar values includes multiplying all elements of the set of check node to variable node messages are multiplied by the second scalar value when the difference is greater than the threshold value.

20. A storage device, the storage device comprising:

a storage medium;

a data processing circuit operable to process a data input derived from the storage medium, and wherein the data processing circuit is operable to:

a data decoder circuit operable to:

apply a variable node algorithm to a data input to yield a first set of variable node to check node messages, and apply a check node algorithm to the first set of variable node to check node messages to yield a set of check node to variable node messages during a first iteration;

calculate a first number of errors remaining based upon a preceding set of variable node to check node messages, wherein the preceding set of variable node to check node messages precedes the first set of variable node to check node messages;

calculate a second number of errors based upon the first set of variable node to check node messages;

calculate a difference between the first and second number of errors;

multiply the set of check node to variable node messages by one or more scalar values to yield a scaled set of check node to variable node messages, the one or more scalar values being selected based at least in part on the calculated difference between the first and second number of errors; and

apply the variable node algorithm to the scaled set of check node to variable node messages to yield a second set of variable node to check node messages.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2024
From: SEAGATE TECHNOLOGY LLC; SEAGATE SINGAPORE INTERNATIONAL HEADQUARTERS PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 067489/0509 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2015
From: LSI CORPORATION
To: SEAGATE TECHNOLOGY LLC
Reel/Frame 034773/0839 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2014
From: CAI, YU; CHEN, NING; WU, YUNXIANG; HARATSCH, ERICH
To: LSI CORPORATION
Reel/Frame 033022/0582 →