IP Library Granted Patent US 9,118,278
Granted Patent B2
US 9,118,278 · App. 14/264,631 · Granted Aug 25, 2015

High efficiency amplification

Inventor: Martin Paul Wilson (Cambridgeshire, GB)
Assignee: SnapTrack, Inc.
H03F1/0222H03F1/00H03F1/02H03F1/025H03F3/189H03F3/19H03F3/21H03F2200/102H03F2200/331H03F2200/451H03F2200/504H03F2200/511
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,118,278
App. No.
14/264,631
Granted
Aug 25, 2015
Kind
B2
Abstract

A radio frequency amplification stage comprising: an amplifier for receiving an input signal to be amplified and a power supply voltage; and a power supply voltage stage for supplying said power supply voltage, comprising: means for providing a reference signal representing the envelope of the input signal; means for selecting one of a plurality of supply voltage levels in dependence on the reference signal; and means for generating an adjusted selected power supply voltage, comprising an ac amplifier for amplifying a difference between the reference signal and one of the selected supply voltage level or the adjusted selected supply voltage level, and a summer for summing the amplified difference with the selected supply voltage to thereby generate the adjusted supply voltage.

Claims (27)

1. An apparatus comprising:

a controller arranged to receive a digital envelope signal, the controller comprising:

a digital-to-analog converter for converting the digital envelope signal into an analog envelope signal; and

a digital controller for generating a digital control signal for a switching stage in dependence on the digital envelope signal,

a modulated supply stage comprising:

a switching stage for receiving the digital control signal and for selecting one of a plurality of supply voltages in dependence on the digital control signal;

a combiner for combining the selected supply voltage with an error signal, and for providing a power supply signal; and

an error amplifier for receiving the analog input signal and the output of the combiner and for generating the error signal;

an analog interface for connecting the analog input signal from the controller to the modulated stage; and

a digital interface for connecting the digital control signal from the controller to the modulated supply stage.

2. The apparatus of claim 1 wherein the controller comprises a digital delay stage for delaying the input to the digital to analog converter.

3. An amplification stage comprising a power amplifier and an apparatus according to claim 1 , the apparatus being adapted to provide a power supply to the power amplifier.

4. The amplification stage of claim 3 wherein the power amplifier is arranged to amplify a signal from which the digital envelope signal is derived.

5. The amplification stage of claim 4 comprising a further analog interface, the signal for the power amplifier to amplify being provided on the further analog interface.

6. The apparatus of claim 1 wherein the controller is a baseband controller.

7. A method of controlling an amplification stage including an amplifier and an envelope tracking power supply for the amplifier, comprising:

receiving a digital envelope signal;

converting the digital envelope signal into an analog envelope signal;

providing the analog envelope signal on an analog interface;

generating a digital control signal in dependence on the digital envelope signal;

providing the digital control signal to a power supply switching stage on a digital interface;

connecting one of a plurality of power supply voltages to an output of the switching stage in dependence on the digital control signal;

combining the connected power supply voltage and an error signal to generate the supply voltage for the amplifier; and

amplifying the difference between the supply voltage for the amplifier and the analog envelope signal to generate the error signal.

8. The method of claim 7 further comprising delaying the input to the digital to analog converter.

9. The method of claim 7 further comprising providing a power supply to the power amplifier.

10. The method of claim 9 further comprising amplifying a signal from which the digital envelope signal is derived.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2015
From: NUJIRA LIMITED
To: SNAPTRACK, INC.
Reel/Frame 036001/0933 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ADDRESS OF ASSIGNEE AND TYPOGRAPHICAL ERRORS PREVIOUSLY RECORDED ON REEL 016956 FRAME 0106. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jun 17, 2015
From: WILSON, MARTIN PAUL
To: NUJIRA LIMITED
Reel/Frame 035855/0957 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: WILSON, MARTIN PAUL
To: NUJIRA LIMITED
Reel/Frame 035498/0181 →
Priority Claims (1)
GB 0303826.2 · Feb 19, 2003 · national
Continuity (5)
Continuation 13460111 · Apr 30, 2012
Continuation 12360727 · Jan 27, 2009
Continuation 11161854 · Aug 19, 2005
Continuation PCTGB0304507 · Oct 17, 2003
Related Publication 20140232470A1 · Aug 21, 2014