Staircase forward error correction coding
View Patent ↗In staircase forward error correction coding, a stream of data symbols are mapped to data symbol positions in a sequence of two-dimensional symbol blocks B i , i a positive integer. Each of the symbol blocks has data symbol positions and coding symbol positions. Coding symbols for the coding symbol positions in each symbol block B i in the sequence are computed. The coding symbols are computed such that, for each symbol block B i that has a preceding symbol block B i−1 and a subsequent symbol block B i+1 in the sequence, symbols at symbol positions along one dimension of the preceding symbol block B i−1 , concatenated with the data symbols and the coding symbols along the other dimension in the symbol block B i , form a codeword of a FEC component code, and symbols at symbol positions along the one dimension of the symbol block B i , concatenated with the data symbols and the coding symbols along the other dimension in the subsequent symbol block B i+1 , form a codeword of the FEC component code. Thus, each row in [B i−1 T B i ] and each column in [ B i B i + 1 T ] for example, is a valid codeword.
1. A Forward Error Correction (FEC) encoding method of an encoding apparatus comprising a mapper and a FEC encoder operatively coupled to the mapper, the method comprising:
mapping data symbols at data symbol positions in a sequence of two-dimensional symbol blocks B i , i a positive integer, to information bits of Optical channel Transport Unit (OTUk) frames, each of the symbol blocks comprising data symbol positions and coding symbol positions;
computing coding symbols for the coding symbol positions in each symbol block B i that has a preceding symbol block B i−1 and a subsequent symbol block B i+1 in the sequence, a two-block concatenation of symbols at symbol positions along one dimension of the preceding symbol block B i−1 , concatenated with symbols at symbol positions along the other dimension in the symbol block B i , forming a codeword of a FEC component code, and a two-block concatenation of symbols at symbol positions along the one dimension of the symbol block B i , concatenated with symbols at symbol positions along the other dimension in the subsequent symbol block B i+1 , forming a codeword of the FEC component code,
mapping the coding symbols to parity bits of OTUk frames.
2. The method of claim 1 , wherein each symbol block comprises an n row by m column array of symbols, m, n≧1, n>m, the computing comprising:
computing the coding symbols for the coding symbol positions in each symbol block B i based on D i−1 and B i , where D i−1 is a matrix formed by adding (n−m) sets of n predetermined symbols along the one dimension of B i−1 .
3. The method of claim 2 , wherein the predetermined symbols comprise all zeros.
4. The method of claim 1 , wherein the symbol blocks comprise 512 rows by 510 columns of bits, and wherein the FEC component code comprises an extended Bose-Chaudhuri-Hocquenghem (1022, 990) code in non-cyclic form.
5. The method of claim 4 ,
wherein mapping the data symbols to information bits comprises mapping the data symbols in each symbol block B i , i≧1, to information bits of two OTUk frames,
wherein mapping the coding symbols to parity bits of OTUk frames comprises mapping the coding symbols in each symbol block B i−1 , i≧2, to parity bits of the two OTUk frames to which the data symbols in symbol block B, are mapped.
6. The method of claim 1 , wherein the symbol blocks comprise 196 rows by 187 columns of bits, and wherein the FEC component code comprises a Bose-Chaudhuri-Hocquenghem (383, 353) code in non-cyclic form.
7. The method of claim 6 ,
wherein mapping the data symbols to information bits comprises mapping the data symbols in each symbol block B i , i≧1, to information bits of one of four rows of an OTUk frame,
wherein mapping the coding symbols to parity bits of OTUk frames comprises mapping the coding symbols in each symbol block B i−1 , i≧2, to parity bits of the OTUk frame row to which the data symbols in symbol block B i are mapped.
8. A non-transitory computer-readable medium storing instructions which when executed by a computer cause the computer to perform the method of claim 1 .
9. Apparatus comprising:
an Optical channel Transport Unit (OTUk) frame generator to generate OTUk frames;
a mapper, operatively coupled to the OTUk frame generator, to map data symbols at data symbol positions in a sequence of two-dimensional symbol blocks B i , i a positive integer, to information bits of the OTUk frames, and to map coding symbols at coding symbol positions in the sequence of symbol blocks to parity bits of the OTUk frames; and
a Forward Error Correction (FEC) encoder, operatively coupled to the mapper, to compute coding symbols for the coding symbol positions in each symbol block B i that has a preceding symbol block B i−1 and a subsequent symbol block B i+1 in the sequence, a two-block concatenation of symbols at symbol positions along one dimension of the preceding symbol block B i−1 , concatenated with symbols at symbol positions along the other dimension in the symbol block B i , forming a codeword of a FEC component code, and a two-block concatenation of symbols at symbol positions along the one dimension of the symbol block B i , concatenated with symbols at symbol positions along the other dimension in the subsequent symbol block B i+1 , forming a codeword of the FEC component code.
10. The apparatus of claim 9 , wherein each symbol block comprises an n row by m column array of symbols, m, n≧1, n>m, the FEC encoder computing the coding symbols for the coding symbol positions in each symbol block B i based on D i−1 B i , where D i−1 is a matrix formed by adding (n−m) sets of n predetermined symbols along the one dimension of B i−1 .
11. A Forward Error Correction (FEC) decoding method of a FEC decoder, the method comprising:
receiving Optical channel Transport Unit (OTUk) frames, the received OTUk frames comprising information bits and parity bits;
demapping, from the information bits in the received OTUk frames, data symbols for data symbol positions in a sequence of FEC encoded two-dimensional symbol blocks B i , i a positive integer;
demapping, from the parity bits in the received OTUk frames, coding symbols for coding symbol positions in the sequence of symbol blocks, the coding symbols for the coding symbol positions in each symbol block B i in the sequence having been computed at a transmitter of the received symbol blocks such that, for each symbol block B, that has a preceding symbol block B i−1 and a subsequent symbol block B i+1 in the sequence, a two-block concatenation of symbols at symbol positions along one dimension of the preceding symbol block B i−1 , concatenated with symbols at symbol positions along the other dimension in the symbol block B i , forms a codeword of a FEC component code, and a two-block concatenation of symbols at symbol positions along the one dimension of the symbol block B i , concatenated with symbols at symbol positions along the other dimension in the subsequent symbol block B i+1 , forms a codeword of the FEC component code; and
decoding the FEC encoded symbol blocks.
12. Apparatus comprising:
an Optical channel Transport Unit (OTUk) framer to delineate OTUk frames from signals received over an optical channel, the OTUk frames comprising information bits and parity bits;
a demapper, operatively coupled to the OTUk framer, to demap from the information bits in the OTUk frames, data symbols for data symbol positions in a sequence of FEC encoded two-dimensional symbol blocks B i , i a positive integer, and to demap from the parity bits in the OTUk frames coding symbols for coding symbol positions in the sequence of symbol blocks, the coding symbols for the coding symbol positions in each symbol block B i in the sequence having been computed at a transmitter of the symbol blocks such that, for each symbol block B, that has a preceding symbol block B i−1 and a subsequent symbol block B i+1 in the sequence, a two-block concatenation of symbols at symbol positions along one dimension of the preceding symbol block B i−1 , concatenated with symbols at symbol positions along the other dimension in the symbol block B i , forms a codeword of a FEC component code, and a two-block concatenation of symbols at symbol positions along the one dimension of the symbol block B i , concatenated with symbols at symbol positions along the other dimension in the subsequent symbol block B i+1 , forms a codeword of the FEC component code; and
a decoder, operatively coupled to the de-mapper, to decode the FEC encoded symbol blocks.
13. The method of claim 5 , further comprising:
assigning arbitrary values to the parity bits of the two OTUk frames to which the data symbols from symbol block B 1 are mapped.
14. The method of claim 7 , further comprising:
appending dummy bits to the parity bits to which the coding symbols are mapped, to complete each OTUk row.
15. The method of claim 14 , wherein a number of the dummy bits appended to the parity bits is fixed.
16. The method of claim 14 , wherein the dummy bits have a value of zero.
17. The method of claim 7 , further comprising:
appending dummy bits in columns of the OTUk frames following the parity bits to which the coding symbols are mapped, to complete each OTUk row.
18. The method of claim 17 , wherein a number of the columns in which the dummy bits are appended is fixed.
19. The method of claim 17 , wherein the dummy bits have a value of zero.
20. The apparatus of claim 9 , wherein each symbol block comprises an n row by m column array of symbols, m, n≧1, n>m, the FEC encoder being configured to compute the coding symbols for the coding symbol positions in each symbol block B i based on D i−1 and B i , where D i−1 is a matrix formed by adding (n−m) sets of n predetermined symbols along the one dimension of B i−1 .
21. The apparatus of claim 20 , wherein the predetermined symbols comprise all zeros.
22. The apparatus of claim 9 , wherein the symbol blocks comprise 512 rows by 510 columns of bits, and wherein the FEC component code comprises an extended Bose-Chaudhuri-Hocquenghem (1022, 990) code in non-cyclic form.
23. The apparatus of claim 22 ,
wherein the mapper is configured to map the data symbols to information bits by mapping the data symbols in each symbol block B i , i≧1, to information bits of two OTUk frames, and to map the coding symbols to parity bits of OTUk frames by mapping the coding symbols in each symbol block B i−1 , i≧2, to parity bits of the two OTUk frames to which the data symbols in symbol block B i are mapped.
24. The apparatus of claim 9 , wherein the symbol blocks comprise 196 rows by 187 columns of bits, and wherein the FEC component code comprises a Bose-Chaudhuri-Hocquenghem (383, 353) code in non-cyclic form.
25. The apparatus of claim 24 ,
wherein the mapper is configured to map the data symbols to information bits by mapping the data symbols in each symbol block B i , i≧1, to information bits of one of four rows of an OTUk frame, and to map the coding symbols to parity bits of OTUk frames by mapping the coding symbols in each symbol block B i−1 , i≧2, to parity bits of the OTUk frame row to which the data symbols in symbol block B i are mapped.
26. The apparatus of claim 23 , wherein the mapper is further configured to assign arbitrary values to the parity bits of the two OTUk frames to which the data symbols from symbol block B 1 are mapped.
27. The apparatus of claim 25 , wherein the mapper is further configured to append dummy bits to the parity bits to which the coding symbols are mapped, to complete each OTUk row.
28. The apparatus of claim 27 , wherein a number of the dummy bits appended to the parity bits is fixed.
29. The apparatus of claim 27 , wherein the dummy bits have a value of zero.
30. The apparatus of claim 25 , wherein the mapper is further configured to append dummy bits in columns of the OTUk frames following the parity bits to which the coding symbols are mapped, to complete each OTUk row.
31. The apparatus of claim 30 , wherein a number of the columns in which the dummy bits are appended is fixed.
32. The apparatus of claim 30 , wherein the dummy bits have a value of zero.
33. The apparatus of claim 9 , further comprising:
a transmitter, operatively coupled to the FEC encoder, to transmit the OTUk frames.
34. The apparatus of claim 12 , further comprising:
a receiver, operatively coupled to the OTUk framer, to receive the signals over the optical channel.
35. An optical communication system comprising:
the apparatus of claim 33 ;
an optical communication medium coupled to the transmitter, the transmitter being configured to transmit the OTUk frames over the optical communication medium;
a receiver to receive optical signals over the optical communication medium;
an Optical channel Transport Unit (OTUk) framer, operatively coupled to the receiver, to delineate received OTUk frames from the received optical signals, the received OTUk frames comprising received versions of the transmitted OTUk frames and comprising information bits and parity bits;
a demapper, operatively coupled to the OTUk framer, to demap from the information bits in the received OTUk frames received versions of the data symbols, and to demap from the parity bits in the received OTUk frames received versions of the coding symbols; and
a decoder, operatively coupled to the de-mapper, to decode symbol blocks comprising the received versions of the data symbols and the received versions of the coding symbols.