IP Library Granted Patent US 9,559,183
Granted Patent B2
US 9,559,183 · App. 14/271,277 · Granted Jan 31, 2017

Semiconductor device with varying thickness of insulating film between electrode and gate electrode and method of manufacturing semiconductor device

Inventors: Takashi Inoue (Kawasaki, JP); Tatsuo Nakayama (Kawasaki, JP); Yasuhiro Okamoto (Kawasaki, JP); Hiroshi Kawaguchi (Kawasaki, JP); Toshiyuki Takewaki (Kawasaki, JP); Nobuhiro Nagura (Kawasaki, JP); Takayuki Nagai (Kawasaki, JP); Yoshinao Miura (Kawasaki, JP); Hironobu Miyamoto (Kawasaki, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H01L29/513H01L29/402H01L29/4236H01L29/42368H01L29/42376H01L29/66431H01L29/66462H01L29/7783H01L29/7787H01L29/7827H01L29/2003H01L29/452
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Quick Facts
Patent No.
US 9,559,183
App. No.
14/271,277
Granted
Jan 31, 2017
Kind
B2
Abstract

To provide a semiconductor device having improved characteristics. The semiconductor device has a substrate and thereon a buffer layer, a channel layer, a barrier layer, a trench penetrating therethrough and reaching the inside of the channel layer, a gate electrode placed in the trench via a gate insulating film, and drain and source electrodes on the barrier layer on both sides of the gate electrode. The gate insulating film has a first portion made of a first insulating film and extending from the end portion of the trench to the side of the drain electrode and a second portion made of first and second insulating films and placed on the side of the drain electrode relative to the first portion. The on resistance can be reduced by decreasing the thickness of the first portion at the end portion of the trench on the side of the drain electrode.

Claims (25)

1. A semiconductor device, comprising:

a first nitride semiconductor layer formed over a substrate;

a second nitride semiconductor layer formed over the first nitride semiconductor layer and having a band gap wider than that of the first nitride semiconductor layer;

a trench penetrating through the second nitride semiconductor layer and reaching an inside of the first nitride semiconductor layer;

a gate electrode placed in the trench above a gate insulating film;

a first electrode and a second electrode formed over the second nitride semiconductor layer on both sides of the gate electrode, respectively,

wherein the gate insulating film includes:

a first portion extending from an end portion of the trench toward the first electrode, and located on a side of the end portion of the trench;

a second portion located between the first electrode and the first portion, having a film thickness greater than that of the first portion, and including a first side surface facing the first electrode; and

a third portion located between the first electrode and the second portion, having a film thickness less than the film thickness of the second portion, and including a second side surface facing the first electrode; and

an insulating layer disposed on the first side surface, the second side surface, and an upper surface of the third portion, the insulating layer extending from the first electrode to reach to the first side surface of the second portion,

wherein the first side surface and the second side surface each contact the upper surface of the third portion.

2. The semiconductor device according to claim 1 , wherein the first portion includes a second film placed over the second nitride semiconductor layer, and

wherein the second portion includes a first film and the second film, the second film being placed over the second nitride semiconductor layer and the first film.

3. The semiconductor device according to claim 2 , wherein the second film comprises a film containing aluminum oxide.

4. The semiconductor device according to claim 3 , wherein the first film comprises a film containing silicon nitride.

5. The semiconductor device according to claim 1 , wherein the trench comprises a tapered side wall.

6. The semiconductor device according to claim 5 , wherein an angle between a side surface of the trench and an extension of a bottom surface of the trench is 90° or less.

7. The semiconductor device according to claim 6 , wherein the angle is 70° or greater but not greater than 90°.

8. The semiconductor device according to claim 2 , wherein a distance between the end portion of the trench and the first film is equal to or greater than a thickness of the second film.

9. The semiconductor device according to claim 8 , wherein the distance between the end portion of the trench and the first film is 0.2 μm or greater.

10. The semiconductor device according to claim 2 , wherein a distance between the end portion of the trench and the first film is 5 nm or greater but not greater than 0.1 μm.

11. The semiconductor device according to claim 1 , wherein the insulating layer is disposed on an upper surface of the second portion of the gate insulating film.

12. The semiconductor device according to claim 1 , wherein the second portion includes a first film and a second film, the second film being placed over the second nitride semiconductor layer and the first film, and

wherein the insulating layer is disposed on an upper surface of the second portion of the gate insulating film.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2014
From: INOUE, TAKASHI; NAKAYAMA, TATSUO; OKAMOTO, YASUHIRO; KAWAGUCHI, HIROSHI; TAKEWAKI, TOSHIYUKI; NAGURA, NOBUHIRO; NAGAI, TAKAYUKI; MIURA, YOSHINAO; MIYAMOTO, HIRONOBU
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 032864/0272 →
Priority Claims (1)
JP 2013-116659 · Jun 3, 2013 · national
Continuity (1)
Related Publication 20140353720A1 · Dec 4, 2014