IP Library Granted Patent US 9,575,748
Granted Patent B2
US 9,575,748 · App. 14/272,376 · Granted Feb 21, 2017

Development, programming, and debugging environment

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Quick Facts
Patent No.
US 9,575,748
App. No.
14/272,376
Granted
Feb 21, 2017
Kind
B2
Abstract

A method includes receiving hardware description code that generically describes circuitry, and translating the hardware description code into one or more configuration files specific to a programmable system. The method further includes generating program code for a microcontroller of the programmable system based, at least in part, on the hardware description code, and configuring the programmable system to implement the circuitry according to the configuration files and the program code.

Claims (53)

1. A computer-implemented method, comprising:

receiving, by a processing device associated with an integrated development environment, an indication to initiate generation of hardware configuration information for a programmable device;

in response to receiving the indication to initiate generation of configuration information, translating, by the processing device, hardware description information into one or more configuration files,

wherein the hardware configuration information comprises:

information describing the configuration of at least one of a first plurality of programmable analog blocks, and

information describing the configuration of at least one of a second plurality of programmable digital blocks; generating routing information automatically based on the hardware description information and the hardware configuration information, and

wherein translating the hardware description code into the one or more configuration files comprises:

converting the hardware description code into a representation of the circuitry,

mapping the converted hardware description code to specific programmable hardware components in the programmable system, and

assigning placement and routing of the circuitry to the mapped, converted hardware description code;

generating program code for a microcontroller of the programmable device based, at least in part, on the hardware description information, wherein the generating program code for a microcontroller of the programmable device comprises generating an application programming interface (API) for communicating, by the microcontroller, with at least one of the first plurality of programmable analog blocks or at least one of the second plurality of programmable digital blocks of the programmable device; and

generating a programming file for the programmable device based on the, the hardware configuration information, the routing information, and the program code.

2. The computer-implemented method of claim 1 , wherein the receiving the indication to initiate generation of hardware configuration information for a programmable device is through a system interface associated with the integrated development environment.

3. The computer-implemented method of claim 1 , wherein the hardware description information comprises at least one of a schematic circuit diagram, a flowchart, a state diagram, or code written according to a hardware description language.

4. The computer-implemented method of claim 1 , further comprising providing the programming file to the microcontroller of the programmable device.

5. The computer-implemented method of claim 1 , further comprising debugging the configured programmable device by performing at least one of a step over, a step into, or a step out operation, to allow incremental evaluations that step through the program code.

6. The computer-implemented method of claim 1 , wherein the performing the translating hardware description information, the generating routing information, the generating program code, the generating a programming file, and the debugging are automatic in response to receiving the indication.

7. The computer-implemented method of claim 1 , wherein the routing information is for configuring programmable routing circuitry to couple at least one of the first plurality of programmable analog blocks to at least one of the items selected from the group consisting of at least one programmable digital block of the second plurality of programmable digital blocks, at least one other programmable analog block of the first plurality of programmable blocks, the microcontroller, and at least one of a third plurality of IO pins.

8. A non-transitory computer-readable storage medium to store instruction configured to cause a processing device to perform operations comprising:

receiving, by a processing device associated with an integrated development environment, an indication to initiate generation of hardware configuration information for a programmable device;

in response to receiving the indication to initiate generation of hardware configuration information, translating, by the processing device, hardware description information into one or more configuration files,

wherein the hardware configuration information comprises:

information describing the configuration of at least one of a first plurality of programmable analog blocks, and

information describing the configuration of at least one of a second plurality of programmable digital blocks, and

wherein translating the hardware description code into the one or more configuration files comprises:

converting the hardware description code into a representation of the circuitry,

mapping the converted hardware description code to specific programmable hardware components in the programmable system, and

assigning placement and routing of the circuitry to the mapped, converted hardware description code;

generating routing information automatically based on the hardware description information and the hardware configuration information;

generating program code for a microcontroller of the programmable device based, at least in part, on the hardware description information, wherein the generating program code for a microcontroller of the programmable device comprises generating an application programming interface (API) for communicating, by the microcontroller, with at least one of the first plurality of programmable analog blocks or at least one of the second plurality of programmable digital blocks of the programmable device; and

generating a programming file for the programmable device based on the, the hardware configuration information, the routing information, and the program code.

9. The non-transitory computer-readable storage medium to store instruction configured to cause a processing device to perform operations of claim 8 , wherein the receiving the indication to initiate generation of hardware configuration information for a programmable device occurs through a system interface associated with the integrated development environment.

10. The non-transitory computer-readable storage medium to store instruction configured to cause a processing device to perform operations of claim 8 , wherein the hardware description information comprises at least one of a schematic circuit diagram, a flowchart, a state diagram, or code written according to a hardware description language.

11. The non-transitory computer-readable storage medium to store instruction configured to cause a processing device to perform operations of claim 8 , further comprises providing the programming file to the microcontroller of the programmable device.

12. The non-transitory computer-readable storage medium to store instruction configured to cause a processing device to perform operations of claim 8 , further comprising debugging the programmable device as configured by the configuration file, routing information, and program code, wherein the debugging the programmable device comprises performing at least one of a step over, a step into, or a step out operation, to allow incremental evaluations that step through the program code.

13. The non-transitory computer-readable storage medium to store instruction configured to cause a processing device to perform operations of claim 8 , further comprising performing the translating hardware description information, generating routing information, generating program code, generating a programming file, and debugging automatically in response to receiving the indication.

14. The non-transitory computer-readable storage medium to store instruction configured to cause a processing device to perform operations of claim 8 , wherein the routing information is for configuring programmable routing circuitry to couple at least one of the first plurality of programmable analog blocks to at least one of the items selected from the group consisting of at least one programmable digital block of the second plurality of programmable digital blocks, at least one other programmable analog block of the first plurality of programmable blocks, the microcontroller, and at least one of a third plurality of IO pins.

15. A processing device associated with an integrated development environment for configuring a programmable device, the processing device having a memory storing executable instructions configured to:

receive an indication to initiate generation of hardware configuration information for a programmable device;

in response to receiving the indication to initiate generation of hardware configuration information, translate, by the processing device, hardware description information into one or more configuration files,

wherein the hardware configuration information comprises:

information describing the configuration of at least one of a first plurality of programmable analog blocks, and

information describing the configuration of at least one of a second plurality of programmable digital blocks, and

wherein translating the hardware description code into the one or more configuration files comprises:

converting the hardware description code into a representation of the circuitry,

mapping the converted hardware description code to specific programmable hardware components in the programmable system, and

assigning placement and routing of the circuitry to the mapped, converted hardware description code;

generate routing information automatically based on the hardware description information and the hardware configuration information;

generate program code for a microcontroller of the programmable device based, at least in part, on the hardware description information;

generate an application programming interface (API) for communicating, by the microcontroller, with at least one of the first plurality of programmable analog blocks or at least one of the second plurality of programmable digital blocks of the programmable device; and

generate a programming file for the programmable device based on the, the hardware configuration information, the routing information, and the program code.

16. The processing device of claim 15 , further configured to debug the programmable device as configured by the configuration file, routing information, and program code, wherein the debugging the programmable device comprises performing at least one of a step over, a step into, or a step out operation, to allow incremental evaluations that step through the program code.

17. The processing device of claim 16 , wherein the routing information is for configuring programmable routing circuitry to couple at least one of the first plurality of programmable analog blocks to at least one of the items selected from the group consisting of at least one programmable digital block of the second plurality of programmable digital blocks, at least one other programmable analog block of the first plurality of programmable blocks, the microcontroller, and at least one of a third plurality of IO pins.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2014
From: MOHAMMED, HANEEF; GRIFFIN, JACK
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 032850/0183 →