IP Library Granted Patent US 9,276,071
Granted Patent B2
US 9,276,071 · App. 14/276,546 · Granted Mar 1, 2016

Semiconductor device and method for producing semiconductor device

Inventors: Takashi Yoshimura (Matsumoto, JP); Masayuki Miyazaki (Matsumoto, JP); Hiroshi Takishita (Matsumoto, JP); Hidenao Kuribayashi (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L29/32H01L21/263H01L21/26506H01L29/0834H01L29/1095H01L29/36H01L29/66128H01L29/7395H01L29/861H01L29/8611H01L21/324H01L29/0619
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,276,071
App. No.
14/276,546
Granted
Mar 1, 2016
Kind
B2
Abstract

Hydrogen atoms and crystal defects are introduced into an n− semiconductor substrate by proton implantation. The crystal defects are generated in the n− semiconductor substrate by electron beam irradiation before or after the proton implantation. Then, a heat treatment for generating donors is performed. The amount of crystal defects is appropriately controlled during the heat treatment for generating donors to increase a donor generation rate. In addition, when the heat treatment for generating donors ends, the crystal defects formed by the electron beam irradiation and the proton implantation are recovered and controlled to an appropriate amount of crystal defects. Therefore, for example, it is possible to improve a breakdown voltage and reduce a leakage current.

Claims (43)

1. A semiconductor device comprising:

a first-conduction-type semiconductor substrate including a first-conduction-type drift layer;

a first second-conduction-type semiconductor layer that is provided in one main surface of the semiconductor substrate and is adjacent to the drift layer;

a second first-conduction-type or second-conduction-type semiconductor layer that is provided in the other main surface of the semiconductor substrate;

one or more first-conduction-type high-concentration layer that are provided between the drift layer and the second semiconductor layer and have a higher impurity concentration than the drift layer;

a first crystal defect region including the drift layer; and

a second crystal defect region that includes the high-concentration layer, is provided adjacent to the first crystal defect region, and has a lower defect concentration than the first crystal defect region.

2. The semiconductor device according to claim 1 , wherein the high-concentration layer has a hydrogen-induced donor.

3. The semiconductor device according to claim 1 , wherein a carrier lifetime of the second crystal defect region is longer than a carrier lifetime of the first crystal defect region.

4. The semiconductor device according to claim 1 , wherein a carrier lifetime of the second crystal defect region increases from one main surface to the other main surface of the semiconductor substrate.

5. The semiconductor device according to claim 1 , wherein the first crystal defect region includes a vacancy and a divacancy as the main crystal defects.

6. The semiconductor device according to claim 1 , wherein the second crystal defect region includes a composite defect of a vacancy, oxygen, and hydrogen as the main crystal defect.

7. The semiconductor device according to claim 1 , wherein the second crystal defect region has a dangling bond which is terminated by hydrogen.

8. The semiconductor device according to claim 1 , wherein the distance of the high-concentration layer adjacent to the drift layer from the other main surface of the semiconductor substrate is at least 15 μm.

9. The semiconductor device according to claim 1 , wherein, when q is an elementary charge, N d is the average concentration of the drift layer, ε S is the permittivity of the semiconductor substrate, V rate is a rated voltage, J F is rated current density, and v sat is a saturated velocity in which a carrier speed is saturated with predetermined electric field intensity, a distance index L is represented by the following Expression (1):

L

=

q

ɛ

S

V

rate

(

J

F

qv

sat

+

N

d

)

[

Expression

(

1

)

]

when the depth of a position, where the carrier concentration of the high-concentration layer which is adjacent to the first semiconductor layer with the drift layer interposed therebetween is the maximum, from the other main surface of the semiconductor substrate is X and the thickness of the semiconductor substrate is W0, X=W0−γL is established and γ is in the range of 0.7 to 1.6.

10. The semiconductor device according to claim 1 , wherein a carrier lifetime of the first crystal defect region is uniform in a depth direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2014
From: YOSHIMURA, TAKASHI; MIYAZAKI, MASAYUKI; TAKISHITA, HIROSHI; KURIBAYASHI, HIDENAO
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 033024/0077 →
Priority Claims (1)
JP 2011-287269 · Dec 28, 2011 · national
Continuity (2)
Continuation PCTJP2012084241 · Dec 28, 2012
Related Publication 20140246755A1 · Sep 4, 2014