IP Library Patent Application 14277975
Patent Application
App. No. 14/277,975

SYSTEM AND METHOD FOR PROVIDING IMPROVED SYSTEM PERFORMANCE BY MOVING PINNED DATA TO OPEN NAND FLASH INTERFACE WORKING GROUP MODULES WHILE THE SYSTEM IS IN A RUNNING STATE

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Quick Facts
Patent No.
US None
App. No.
14/277,975
Abstract

Aspects of the disclosure pertain to a system and method for providing improved system performance by moving pinned data to ONFI module(s) while the system is in a running state. Further, when a virtual array of the system is offline, the system allows for scheduling and performance of background operations on virtual arrays which are still online. These characteristics promote the ability of the online virtual arrays to operate efficiently in the presence of the pinned data.

Claims (36)

1 . A method of operation of a disk array controller, the method comprising:

generating a plurality of virtual arrays via the controller;

generating pinned data in a cache of the controller, the pinned data being associated with an offline array included in the plurality of virtual arrays; and

transmitting the pinned data from the cache to an Open NOT AND Flash Interface Working Group (ONFI) module of the controller.

2 . The method as claimed in claim 1 , further comprising:

scheduling and performing background operations via the controller for an online array included in the plurality of virtual arrays.

3 . The method as claimed in claim 2 , further comprising:

when the offline array transitions from an offline state to an online state or to a degraded state, transmitting the pinned data from the ONFI module to the cache.

4 . The method as claimed in claim 3 , further comprising:

transmitting the pinned data from the cache to at least one physical disk drive associated with at least one of the online arrays, the at least one physical disk drive being connected to the controller.

5 . The method as claimed in claim 1 , wherein the disk array controller is a Redundant Array of Independent Disks (RAID) controller.

6 . The method as claimed in claim 1 , wherein each of the plurality of virtual arrays is a write-back array.

7 . The method as claimed in claim 2 , wherein the background operations include one of: background initialization operations and patrol read operations.

8 . A non-transitory computer-readable medium having computer-executable instructions for performing a method of operation of a disk array controller, the method comprising:

generating a plurality of virtual arrays;

generating pinned data in a cache of the controller, the pinned data being associated with an offline array included in the plurality of virtual arrays; and

transmitting the pinned data from the cache to an Open NOT AND Flash Interface Working Group (ONFI) module of the controller.

9 . The non-transitory computer-readable medium as claimed in claim 8 , the method further comprising:

scheduling and performing background operations for an online array included in the plurality of virtual arrays.

10 . The non-transitory computer-readable medium as claimed in claim 9 , the method further comprising:

when the offline array transitions from an offline state to an online state or degraded state, transmitting the pinned data from the ONFI module to the cache.

11 . The non-transitory computer-readable medium as claimed in claim 10 , further comprising:

transmitting the pinned data from the cache to at least one physical disk drive associated with at least one of the online arrays, the at least one physical disk drive being connected to the controller.

12 . The non-transitory computer-readable medium as claimed in claim 8 , wherein the disk array controller is a Redundant Array of Independent Disks (RAID) controller.

13 . The non-transitory computer-readable medium as claimed in claim 8 , wherein each of the plurality of virtual arrays is one of: a write-back array, a concurrent input/output mode array, and an always read ahead array.

14 . The non-transitory computer-readable medium as claimed in claim 9 , wherein the background operations include one of: background initialization operations and patrol read operations.

15 . A disk array controller, comprising:

a processor;

a cache, the cache being connected to the processor;

an Open NOT AND Flash Interface Working Group (ONFI) module, the ONFI module being connected to the cache,

wherein the disk array controller is configured for creating a virtual array corresponding to one or more physical data storage devices connected to the disk array controller, the disk array controller being further configured for, when a state of the virtual array changes from online to offline, generating pinned data in the cache and transmitting the pinned data from the cache to the ONFI module.

16 . The disk array controller as claimed in claim 15 , wherein the transmitting of the pinned data to the ONFI module occurs when the processor is in a running state.

17 . The disk array controller as claimed in claim 16 , the disk array controller being further configured for, when the state of the virtual array changes from offline to online or degraded: transmitting the pinned data from the ONFI module to the cache, and then transmitting the pinned data from the cache to the one or more physical data storage devices corresponding to the virtual array.

18 . The disk array controller as claimed in claim 15 , wherein the disk array controller is a Redundant Array of Independent Disks (RAID) controller.

19 . The disk array controller as claimed in claim 15 , wherein the cache is dynamic random-access memory (DRAM).

20 . The disk array controller as claimed in claim 15 , wherein the disk array controller is a Peripheral Component Interconnect (PCI) expansion card configured for being connected to a motherboard of a host system.

Assignments (4)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: LOKARE, HARSHAVARDHAN S.; YATHAGIRI, NAVEEN A.; PARTHASARATHY, ABHILASH N.; BORAIAH, SAMPATH K.
To: LSI CORPORATION
Reel/Frame 032896/0898 →