Fast voltage level shifter circuit

1. A circuit comprising:

a switch configured to produce an output voltage on an output terminal in response to an input voltage applied to an input terminal and in response to a current drawn through the switch, wherein the output voltage on the output terminal is referenced relative to a floating voltage reference; and

a current source circuit configured to draw the current through the switch at a first level when the input voltage is unchanged and at an increased second level when the input voltage is changing.

2. The circuit of claim 1 , further comprising:

a charge storage circuit configured to increase the current drawn by the current source circuit in response to the input voltage changing and decrease the current in response to the input voltage not changing.

3. The circuit of claim 2 , wherein the charge storage circuit comprises a capacitor connected between the input terminal and the current source circuit.

4. The circuit of claim 3 , further comprising:

one or more inverting amplifiers connected between the input terminal and the capacitor.

5. The circuit of claim 3 , wherein the current source circuit comprises a current mirror, and wherein the capacitor is connected between the input terminal and a reference input to the current mirror.

6. The circuit of claim 5 , wherein the charge storage circuit comprises:

a first diode connected between the capacitor and the reference input to the current mirror, the first diode comprising a first anode connected to the capacitor and a first cathode connected to the reference input to the current mirror; and

a second diode comprising a second cathode connected to the first anode and a second anode connected to a ground.

7. The circuit of claim 1 , further comprising a charge storage circuit connected between the output terminal and the floating voltage reference.

8. The circuit of claim 7 , wherein the charge storage circuit comprises a capacitor or a battery.

9. The circuit of claim 1 , wherein the switch is selected from the group consisting of: a silicon controlled rectifier (SCR), an insulated gate bipolar junction transistor (IGBT), a bipolar junction transistor (BJT), a field effect transistor (FET), a junction field effect transistor (JFET), a switching diode, an electrical relay, a reed relay, a solid state relay, an insulated gate field effect transistor (IGFET), a diode for alternating current (DIAC), and a triode for alternating current TRIAC.

10. A method comprising:

applying an input voltage to an input terminal of a voltage level shifting circuit, thereby producing an output voltage on an output terminal of the voltage level shifting circuit, the output voltage depending on the input voltage and a bias current;

referencing the output voltage on the output terminal relative to a voltage reference that is floating with respect to a ground reference of the voltage level shifting circuit; and

controlling the bias current to a first level in response to the input voltage being unchanged and controlling the bias current to an increased second level in response to the input voltage varying.

11. The method of claim 10 , further comprising:

generating the bias current with a current source circuit; and

charging and discharging a charge storage circuit connected between the input terminal and the current source circuit to control the bias current to the first level and the second level.

12. The method of claim 11 , the discharging of the charge storage circuit momentarily increasing the bias current from the first level to the second level.

13. The method of claim 11 , the charge storage circuit comprising a capacitor connected between the input terminal and the current source circuit, the discharging of the charge storage circuit comprising discharging the capacitor into the current source circuit to increase the bias current from the first level to the second level.

14. The method of claim 13 , the current source circuit comprising a current mirror, the discharging of the capacitor increasing a reference current into a reference input of the current mirror.

15. The method of claim 14 , further comprising:

discharging the capacitor through a first diode connected between the capacitor and the reference input to the current mirror, the first diode comprising a first anode connected to the capacitor and a first cathode connected to the reference input to the current mirror; and

charging the capacitor through a second diode comprising a second cathode connected to the first anode and a second anode connected to a ground.

16. The method of claim 13 , further comprising:

driving a capacitor voltage across the capacitor with one or more inverting amplifiers connected between the input terminal and the capacitor.

17. A method comprising:

connecting a current source circuit to a bias terminal of a switch, the current source circuit being configured to draw a bias current through the bias terminal;

connecting a charge storage circuit between an input terminal to the switch and the current source circuit, the switch being configured to produce an output voltage on an output terminal of the switch based on the bias current and an input voltage on the input terminal, and the charge storage circuit being configured to control the bias current to a first level in response to the input voltage being unchanged and to control the bias current to an increased second level in response to the input voltage varying;

referencing the current source circuit to a ground reference; and

referencing the output terminal to a voltage reference that is floating with respect to the ground reference.

18. The method of claim 17 , connecting within the charge storage circuit a capacitor between the input terminal and the current source circuit.

19. The method of claim 18 , connecting within the current source circuit a current mirror, wherein the capacitor is connected between the input terminal and a reference input of the current mirror.

20. The method of claim 19 , further comprising:

connecting a first diode between the capacitor and the reference input to the current mirror, the first diode comprising a first anode connected to the capacitor and a first cathode connected to the reference input to the current mirror; and

connecting a second diode between the capacitor and the ground reference, the second diode comprising a second cathode connected to the first anode and a second anode connected to the ground reference.