IP Library Granted Patent US 9,154,345
Granted Patent B1
US 9,154,345 · App. 14/280,532 · Granted Oct 6, 2015

Device and method for reducing modulation profile memory size

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Quick Facts
Patent No.
US 9,154,345
App. No.
14/280,532
Granted
Oct 6, 2015
Kind
B1
Abstract

A machine implemented method includes determining a signal modulation for each of a plurality of profiles; generating a first indicator indicating a signal modulation determined for a first profile in the plurality of profiles; generating a second indicator indicating a relationship between the signal modulation for the first profile and the signal modulation for each of the other profiles; notifying at least one node of the first and second indicators.

Claims (39)

1. A method, comprising:

receiving a profile;

determining a first modulation according to a first indicator of a plurality of indicators stored in a memory;

determining a signal modulation as the first modulation when the profile is a first profile; and

determining the signal modulation in relation to the first modulation according to a second indicator of the plurality of indicators when the profile is a second profile,

wherein the first indicator includes a plurality of bits, and the second indicator is a single bit.

2. The method of claim 1 , further comprising determining the signal modulation in relation to the first modulation according to a third indicator of the plurality of indicators when the profile is a third profile.

3. The method of claim 1 , further comprising determining the signal modulation in relation to the first modulation according to the second indicator and a third indicator of the plurality of indicators when the profile is a third profile.

4. The method of claim 1 , wherein the method is performed for each of a plurality of subcarriers.

5. The method of claim 1 , wherein the second indicator having a first value indicates that the first modulation is the same as the second modulation, and the second indicator having a second value indicates that the first modulation has a higher bit rate than the second modulation.

6. The method of claim 1 , wherein the second indicator having a first value indicates that the first modulation is the same as the second modulation, and the second indicator having a second value indicates that the first modulation has a lower bit rate than the second modulation.

7. The method of claim 1 , further comprising:

receiving the plurality of indicators from a first device; and

storing the plurality of indicators in the memory, wherein a second device includes the memory.

8. The method of claim 1 , wherein the first and second modulations are each selected from one of no modulation, Binary Phase Shift Keying, Quadrature Phase Shift Keying, 8-Quadrature Amplitude Modulation (QAM), 16-QAM, 32-QAM, 64-QAM, 128-QAM, 256-QAM, 512-QAM, and 1024-QAM.

9. A non-transitory computer-readable medium configured to store instructions which enable a controller to perform a machine implemented method, the method comprising:

determining a first modulation;

determining a second modulation;

generating a first indicator according to the first modulation; and

generating a second indicator indicating a relationship between the first modulation and the second signal modulation,

wherein the method is performed for each of a plurality of subcarriers.

10. The non-transitory computer-readable medium of claim 9 , wherein the method further comprises:

generating the second indicator having a first value when the first modulation is the same as the second modulation; and

generating the second indicator having a second value when the first modulation has a higher bit rate than the second modulation.

11. The non-transitory computer-readable medium of claim 9 , wherein the method further comprises:

generating the second indicator having a first value when the first modulation is the same as the second modulation; and

generating the second indicator having a second value when the first modulation has a lower bit rate than the second modulation.

12. The non-transitory computer-readable medium of claim 9 , wherein the method further comprises communicating the first and second indicators to a device other than the controller.

13. The non-transitory computer-readable medium of claim 9 , wherein the first and second modulations are each selected from one of no modulation, Binary Phase Shift Keying, Quadrature Phase Shift Keying, 8-Quadrature Amplitude Modulation (QAM), 16-QAM, 32-QAM, 64-QAM, 128-QAM, 256-QAM, 512-QAM, and 1024-QAM.

14. A circuit comprising:

a memory configured to store a plurality of indicators for a subcarrier, wherein a first indicator of the plurality of indicators indicates a first modulation; and

a converter configured to output a modulation for the subcarrier according to the plurality of indicators and a profile, wherein

when the profile is a first profile, the converter is configured to output the first modulation,

when the profile is a second profile, the converter is configured to output a second modulation according to the first modulation and a second indicator of the plurality of indicators, and

when the profile is a third profile, the converter is configured to output a third modulation according to the first modulation and a third indicator of the plurality of indicators.

15. The circuit of claim 14 , wherein when the profile is a third profile, the converter is configured to output a third modulation according to the first modulation, the second indicator, and a third indicator of the plurality of indicators.

16. The circuit of claim 14 , wherein the plurality of indicators is a selected plurality of indicators and the subcarrier is a selected subcarrier, and further comprising:

the memory configured to store a plurality of indicators for each of a plurality of subcarriers, receive a subcarrier index, and output the selected plurality of indicators when the received subcarrier index indicates the selected subcarrier.

17. The circuit of claim 14 , wherein the first indicator includes a plurality of bits, and the second indicator is a single bit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053475/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2020
From: MARVELL INTERNATIONAL LTD.
To: CAVIUM INTERNATIONAL
Reel/Frame 052918/0001 →