Capacitive load drive circuit, fluid ejection device and medical device
View Patent ↗Operation of a digital power amplifier for power amplification of a modulated signal is stopped in a period in which a voltage value of a drive signal applied to a capacitive load is constant, to thereby suppress power loss. The power amplification is stopped either when half a period of time when the modulated signal in a first voltage state maintains the first voltage state elapses or when half a period of time when the modulated signal in a second voltage state which is lower in voltage than the first voltage state maintains the second voltage state elapses. Accordingly, when electric current does not flow in a inductor of a low pass filter, it is possible to stop the power amplification. Thus, it is possible to prevent generation of voltage fluctuation in the drive signal due to an electromotive force caused by a self-induction phenomenon of the inductor.
1. A capacitive load drive circuit which applies a predetermined drive signal to drive a capacitive load, comprising:
a drive waveform generator which generates a drive waveform signal which becomes a reference of the drive signal,
a modulator which pulse-modulates the drive waveform signal to generate a modulated signal in which a first voltage state and a second voltage state which is lower in voltage than the first voltage state are repeated;
a digital power amplifier which power-amplifies the modulated signal to generate a power-amplified modulated signal;
a low pass filter which smoothes the power-amplified modulated signal and generate the drive signal to be applied to the capacitive load; and
a power amplification stopping section which stops operation of the digital power amplifier;
a time counter which counts at least one of the elapsed time of the first voltage state and the elapsed time of the second voltage state of the modulated signal;
the power amplification stopping section, while a voltage level of the drive signal is maintained to be constant, stops the operation of the digital power amplifier either at a timing when the elapsed time of the first voltage state of the modulated signal reaches a predetermined time, or at a timing when the elapsed time of the second voltage state of the modulated signal reaches a predetermined time.
2. The capacitive load drive circuit according to claim 1 ,
wherein the power amplifier stops the operation of the digital power amplifier at a timing when the elapsed time of the first voltage state of the modulated signal reaches a predetermined time, as long as the elapsed time of the first voltage state of the modulated signal is shorter than the elapsed time of the second voltage state,
wherein the power amplifier stops the operation of the digital power amplifier at a timing when the elapsed time of the second state of the modulated signal reaches a predetermined time, as long as the elapsed time of the second voltage state of the modulated signal is shorter than the elapsed time of the first voltage state.
3. The capacitive load drive circuit according to claim 2 ,
the power amplification stopping section stops the operation of the digital power amplifier at a timing when half a period of time which the modulated signal maintains the first voltage state passed as long as the elapsed time of the first voltage state of the modulated signal is shorter than the elapsed time of the second voltage state,
the power amplification stopping section stops the operation of the digital power amplifier at a timing when half a period of time which the modulated signal maintains the second voltage state passed as long as the elapsed time of the second voltage state of the modulated signal is shorter than the elapsed time of the first voltage state.
4. A liquid ejection device including the capacitive load drive circuit according to claim 2 .
5. A liquid ejection device including the capacitive load drive circuit according to claim 1 .