IP Library Granted Patent US 9,231,038
Granted Patent B2
US 9,231,038 · App. 14/284,219 · Granted Jan 5, 2016

Thin film transistor array and EL display employing thereof

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Quick Facts
Patent No.
US 9,231,038
App. No.
14/284,219
Granted
Jan 5, 2016
Kind
B2
Abstract

EL display has a luminescence unit having a luminescence layer being disposed between a pair of electrodes and a thin film transistor array unit controlling luminescence of the luminescence unit. An interlayer insulation film is disposed between the luminescence unit and the transistor array unit. An anode of the luminescence unit is connected electrically to the thin film transistor array via a contact hole of the interlayer insulation film. The thin film transistor array further has a current supplying relaying electrode that is connected to the anode of the luminescence unit via the contact hole of the interlayer insulation film. A diffusion prevention film is formed on the boundary face of the anode of the luminescence unit and the relaying electrode.

Claims (12)

1. An EL display comprising:

a luminescence unit having a luminescence layer disposed between a pair of electrodes;

a thin film transistor array unit controlling luminescence of the luminescence unit;

an interlayer insulation film disposed between the luminescence unit and the transistor array unit; and

a current supplying electrode connected electrically to an electrode of the luminescence unit and for connecting the electrode of the luminescence unit to the thin film transistor array unit via a contact hole of the interlayer insulation film,

wherein a diffusion prevention film is formed on a boundary face between the electrode of the luminescence unit and the current supplying electrode, and the diffusion prevention film is made of an oxide having a main component same as material constituting the electrode of the luminescence unit, and

the diffusion prevention film has a material composition of Al x Cu y O z where x>y≧0, and z>0.

2. The EL display of claim 1 , wherein the diffusion prevention film has a film thickness t, where 0<t≦6 nano-meters.

3. A thin film transistor array unit having an interlayer insulation film disposed between a luminescence unit and a current supplying electrode connected electrically to an electrode of the luminescence unit via a contact hole of the interlayer insulation film,

wherein a diffusion prevention film is formed on a boundary face between the electrode of the luminescence unit and the current supplying electrode, and the diffusion prevention film is made of an oxide having a main component same as material constituting the electrode of the luminescence unit, and

the diffusion prevention film has a material composition of Al x Cu y O z where x>y≧0, and z>0.

4. The thin film transistor array unit of claim 3 , wherein the diffusion prevention film has a film thickness t, where 0<t≦6 nano-meters.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2015
From: PANASONIC CORPORATION
To: JOLED INC
Reel/Frame 035187/0483 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2014
From: SHINOKAWA, YASUHARU; ITO, KEN
To: PANASONIC CORPORATION
Reel/Frame 033338/0776 →