IP Library Granted Patent US 9,461,596
Granted Patent B1
US 9,461,596 · App. 14/292,241 · Granted Oct 4, 2016

Doherty power amplifier with integrated pre-distortion

Inventor: Kenneth Sean Ozard (Middlesex, NJ)
Assignee: Skyworks Solutions, Inc.
H03F1/3247H03F3/68H03G1/0017H03F2200/435H03F2201/3231
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Quick Facts
Patent No.
US 9,461,596
App. No.
14/292,241
Granted
Oct 4, 2016
Kind
B1
Abstract

The present invention implements a series of analog gain and phase correction circuits in each leg of the N-way Doherty to significantly reduce amplitude modulation to amplitude modulation (AM-AM) and amplitude modulation to phase modulation (AM-PM), distortion. The correction blocks comprise gain and phase corrections and optionally an additional gain block. The phase corrections include at least a phase offset and may include an optional non-linear element such as a diode pre-distorter. The pre-distortion circuitry is intended to reduce the necessary complexity of the DPD and reduce the DPD cost and power consumption. The gain and phase corrections can be calculated from computational optimization to minimize the AM-AM and AM-PM distortion. The gain and phase corrections can also be calculated from the AM-AM and AM-PM data which can be output from common DPD systems and laboratory characterization equipment.

Claims (27)

1. An N-way Doherty amplifier comprising:

a main amplifier;

(N−1) peaking amplifiers where N is equal to or greater than 2; and

individual pre-distortion circuits monolithically integrated into the main amplifier and into each peaking amplifier to reduce amplitude modulation to amplitude modulation (AM-AM) distortion and amplitude modulation to phase modulation (AM-PM) distortion in the amplifiers in which they are integrated.

2. The amplifier of claim 1 wherein each pre-distortion circuit is implemented with a variable element such as a digitally controlled variable gain amplifier or digitally controlled phase shifter.

3. The amplifier of claim 1 wherein each pre-distortion circuit is implemented with gain and phase circuits.

4. The amplifier of claim 3 wherein controls for the gain and phase circuits are static.

5. The amplifier of claim 3 wherein controls for the gain and phase circuits are programmed dynamically through a digital interface.

6. The amplifier of claim 3 wherein controls for the gain and phase circuits are obtained from a look up table (LUT) that is a function of other variables such as temperature, frequency, etc.

7. The amplifier of claim 1 wherein the main amplifier is a linear amplifier.

8. The amplifier of claim 7 wherein the linear main amplifier is a distortion cancelling class AB power amplifier.

9. The amplifier of claim 8 wherein one or more of the peaking amplifiers are linear amplifiers.

10. The amplifier of claim 9 wherein the linear peaking amplifiers are distortion cancelling class AB power amplifiers re-biased to emulate Class-C amplifiers by introducing very strong gain expansion.

11. The amplifier of claim 1 wherein one or more of the peaking amplifiers are linear amplifiers.

12. The amplifier of claim 11 wherein the linear peaking amplifiers are distortion cancelling class AB power amplifiers re-biased to emulate Class-C amplifiers by introducing very strong gain expansion.

13. The amplifier of claim 1 wherein the pre-distortion circuit integrated into the main amplifier and into each peaking amplifier comprises an attenuator to adjust for AM-AM humps and a fixed phase offset.

14. The amplifier of claim 13 wherein the pre-distortion circuit also comprises a diode pre-distorter.

15. The amplifier of claim 13 wherein the pre-distortion circuit also comprises a gain stage.

16. A Doherty amplifier comprising a plurality of power amplifiers with a different pre-distortion circuit block monolithically integrated into each of the power amplifiers to reduce amplitude modulation to amplitude modulation (AM-AM) distortion and amplitude modulation to phase modulation (AM-PM) in the power amplifier in which it is integrated.

17. An N-way Doherty amplifier comprising

a signal splitter for splitting an input signal into N signals and for delaying (N−1) of the N signals by different amounts;

N power amplifiers for amplifying the N signals from the signal splitter;

a different pre-distortion circuit monolithically integrated into each of the N power amplifiers to reduce amplitude modulation to amplitude modulation (AM-AM) distortion and amplitude modulation to phase modulation (AM-PM) distortion in the power amplifier in which it is integrated; and

a signal combiner for producing an output signal by combining an output from each of the N power amplifiers after outputs from (N−1) of the amplifiers are delayed by different amounts.

18. The Doherty amplifier of claim 17 where the signal splitter delays (N−1) of the N signals by different integral numbers of a quarter wavelength of the input signal.

19. The Doherty amplifier of claim 17 where the signal combiner delays (N−1) of the N signals by different integral numbers of a quarter wavelength of the input signal.

20. The Doherty amplifier of claim 17 wherein each pre-distortion circuit is implemented with gain and phase circuits.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2017
From: II-VI OPTOELECTRONIC DEVICES, INC.
To: SKYWORKS SOLUTIONS, INC.
Reel/Frame 042551/0708 →
CHANGE OF NAME Recorded May 1, 2017
From: ANADIGICS, INC.
To: II-VI OPTOELECTRONIC DEVICES, INC.
Reel/Frame 042381/0761 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUS NUMBER 6790900 AND REPLACE IT WITH 6760900 PREVIOUSLY RECORDED ON REEL 034056 FRAME 0641. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded Nov 21, 2016
From: ANADIGICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 040660/0967 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 037973 FRAME: 0226. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded May 18, 2016
From: ANADIGICS, INC.
To: II-VI INCORPORATED
Reel/Frame 038744/0835 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2016
From: II-VI INCORPORATED
To: ANADIGICS, INC.
Reel/Frame 038119/0312 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Mar 1, 2016
From: ANADIGICS, INC.
To: II-IV INCORPORATED
Reel/Frame 037973/0226 →
RELEASE OF SECURITY INTEREST Recorded Mar 1, 2016
From: SILICON VALLEY BANK
To: ANADIGICS, INC.
Reel/Frame 037973/0133 →
SECURITY AGREEMENT Recorded Oct 27, 2014
From: ANADIGICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 034056/0641 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2014
From: OZARD, KENNETH SEAN
To: ANADIGICS, INC.
Reel/Frame 033191/0104 →
Continuity (1)
Provisional Application 61829703 · May 31, 2013