IP Library Granted Patent US 9,740,509
Granted Patent B2
US 9,740,509 · App. 14/292,367 · Granted Aug 22, 2017

Generic physical location codes for virtual system and partition cloning

Inventors: Eric P. Fried (Austin, TX); Swaroop Jayanthi (Bangalore, IN); Thangadurai Muthusamy (Bangalore, IN); Amartey S. Pearson (Austin, TX)
Assignee: International Business Machines Corporation
G06F9/44505G06F9/45558G06F13/4068G06F13/4221G06F2009/45562
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Quick Facts
Patent No.
US 9,740,509
App. No.
14/292,367
Granted
Aug 22, 2017
Kind
B2
Abstract

A cloned configuration of a source machine is created by determining a first set of physical location codes for a source machine. A map is generated based on the sorted physical location codes that maps the first set of physical location codes to a first set of generic location codes. A second set of physical location codes associated with a second set of adapter slots in a target machine is generated. A second map is generated based on the sorted second set of physical location codes that maps the second set of physical location codes to a second set of generic location codes. A third set of physical location codes is generated based on the first set of generic location codes and the second map. If an entry in the third set of physical location codes is not present the second set of physical location codes, an error is generated.

Claims (32)

1. A computer program product for cloning a machine configuration, the computer program product comprising a non-transitory computer readable storage medium having program instructions embodied therewith, the program instructions executable by one or more processors to cause the one or more processors to:

read a configuration file having a first set of generic location codes;

determine a first set of physical location codes associated with a first set of adapter slots in a target machine;

determine a first order for the first set of physical location codes;

generate, based at least in part on the first order, a first map that maps the first set of physical location codes to a second set of generic location codes;

generate a second set of physical location codes from the first set of generic location codes and the first map; and

utilize the second set of physical location codes in a configuration for the target machine.

2. The computer program product of claim 1 , wherein the first set of physical location codes is sorted according to a discovery order.

3. The computer program product of claim 1 , wherein the first set of generic location codes are created by the one or more processors according to instructions that cause the one or more processors to:

determine a third set of physical location codes associated with a second set of adapter slots in a source machine;

determine a second order for the third set of physical location codes; and

generate, based at least in part on the first order, a second map that maps the third set of physical location codes to the first set of generic location codes.

4. The computer program product of claim 1 , wherein a physical location code of the first set of physical location codes includes a first unique portion and a second non-unique portion, and wherein the first map includes a mapping from the first unique portion to a generic portion of a generic location code.

5. The computer program product of claim 4 , wherein the first unique portion identifies an input/output (I/O) enclosure and wherein the second non-unique portion identifies an adapter card slot within the I/O enclosure.

6. A system comprising:

a processor; and

a non-transitory computer readable storage medium communicably coupled to the processor, the computer readable storage medium having program instructions embodied therewith, the program instructions executable by the processor to cause the processor to:

determine a first set of physical location codes associated with a first set of adapter slots in a source machine,

determine a first order for the first set of physical location codes, and

generate, based at least in part on the first order, a first map that maps the first set of physical location codes to a first set of generic location codes;

wherein unassigned slots are omitted from the mapping of the first set of physical location codes to the first set of generic location codes.

7. The system of claim 6 , wherein the program instructions further comprise program instructions executable by the processor to cause the processor to:

determine a second set of physical location codes associated with a second set of adapter slots in a target machine;

determine a second order for the second set of physical location codes;

generate, based at least in part on the second order, a second map that maps the second set of physical location codes to a second set of generic location codes;

generate a third set of physical location codes from the first set of generic location codes and the second map; and

utilize the third set of physical location codes in a configuration for the target machine.

8. The system of claim 7 , wherein the program instructions further comprise program instructions executable by the processor to cause the processor to, in response to a determination that an entry in the third set of physical location codes is not present the second set of physical location codes, generate an error.

9. The system of claim 6 , wherein the first set of physical location codes are sorted according to a discovery order.

10. The system of claim 6 , wherein the program instructions further comprise program instructions executable by the processor to cause the processor to read the first set of generic location codes from a configuration template.

11. The system of claim 6 , wherein a physical location code of the first set of physical location codes includes a first unique portion and a second non-unique portion, and wherein the first map includes a mapping from the first unique portion to a generic portion of a generic location code.

12. The system of claim 11 , wherein the first unique portion identifies an input/output (I/O) enclosure and wherein the second non-unique portion identifies an adapter card slot within the I/O enclosure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2014
From: FRIED, ERIC P.; JAYANTHI, SWAROOP; MUTHUSAMY, THANGADURAI; PEARSON, AMARTEY S.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 033185/0198 →
Continuity (1)
Related Publication 20150347158A1 · Dec 3, 2015