IP Library Granted Patent US 9,497,854
Granted Patent B2
US 9,497,854 · App. 14/294,642 · Granted Nov 15, 2016

Multi-layer power converter with devices having reduced lateral current

Inventor: David Giuliano (Brookline, MA)
Assignee: ARCTIC SAND TECHNOLOGIES, INC.
H05K1/0298H01L23/481H01L23/5223H01L23/64H01L23/642H01L25/16H01L27/016H01L27/0688H01L28/40H01L28/90H02M3/07H05K1/115H01L23/5227H01L2224/0401H01L2224/0557H01L2224/05572H01L2224/16225H01L2224/16265H01L2924/19103H01L2924/19104H02M2003/077
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Quick Facts
Patent No.
US 9,497,854
App. No.
14/294,642
Filed
Jun 3, 2014
Granted
Nov 15, 2016
Kind
B2
Art Unit
2895
USPC
257/774
Abstract

An apparatus having a power converter circuit having a first active layer having a first set of active devices disposed on a face thereof, a first passive layer having first set of passive devices disposed on a face thereof, and interconnection to enable the active devices disposed on the face of the first active layer to be interconnected with the non-active devices disposed on the face of the first passive layer, wherein the face on which the first set of active devices on the first active layer is disposed faces the face on which the first set of passive devices on the first passive layer is disposed.

Claims (33)

1. An apparatus comprising a power converter circuit comprising a stack of layers, said stack comprising a first layer having active devices integrated on a device face thereof and a second layer having passive devices integrated on a device face, thereof, wherein at least one unit selected from the group consisting of said active devices and said passive devices is partitioned into at least a first partition and a second partition, wherein said first partition comprises a first current channel along a first axis, wherein said second partition comprises a second current channel, and wherein said first axis and a second axis orthogonal to said first axis define a plane that is coplanar with the layer that includes said unit, whereby, as a result of said at least one unit having been partitioned into at least said first and second partitions, current flow between said first and second current channels along said second axis is suppressed.

2. The apparatus of claim 1 , wherein said passive devices comprise a planar capacitor.

3. The apparatus of claim 1 , further comprising a regulating circuit in electrical communication with said stack of layers, wherein said regulating circuit comprises a first regulating-circuit partition, a second regulating-circuit partition, a first inductor, and a second inductor, wherein said first inductor comprises a first terminal and a second terminal, wherein said first terminal of said first inductor is connected to an output of said first regulating-circuit partition, and wherein said second terminal of said first inductor is connected to a load, wherein said second inductor comprises a first terminal and a second terminal, wherein said first terminal of said second inductor is connected to an output of said second regulating-circuit partition, and wherein said second terminal of said second inductor is connected to said second terminal of said first inductor, whereby in operation, said second terminal of said first inductor and said second terminal of said second inductor are at a common potential.

4. The apparatus of claim 3 , further comprising a load connected to said second terminal of said first inductor and said second terminal of said second inductor.

5. The apparatus of 4 , wherein a first switched capacitor unit is positioned over said first regulating-circuit partition at a location that minimizes an extent to which current travels between said power converter circuit and said first regulating-circuit partition.

6. The apparatus of claim 1 , further comprising a first terminal, a second terminal, a third terminal, and a fourth terminal, wherein said first current channel extends between said first terminal and said second terminal, and wherein said second current channel extends between said third terminal and said fourth terminal.

7. The apparatus of claim 6 , wherein said first current channel enables electric current to flow directly between said first terminal and second terminal, and wherein said electric current bypasses said second current channel.

8. The apparatus of claim 6 , wherein said second current channel enables electric current to flow directly between said third terminal and said fourth terminal, and wherein said electric current bypasses said first current channel.

9. The apparatus of claim 1 , wherein said second current channel extends along a third axis, wherein said third axis extends along a direction having a component that is parallel to said first axis.

10. The apparatus of claim 1 , wherein said second current channel extends along a third axis, wherein said third axis is parallel to said first axis.

11. An apparatus comprising a power converter circuit comprising a stack of layers, each of which includes devices that are integrated into one of a single monolithic substrate and multiple monolithic substrates, said stack of layers comprising first and second layers having corresponding first and second device faces on which devices are formed, wherein said first layer comprises an active device and said second layer comprises a passive device, wherein a unit selected from one of said first layer and said second layer comprises first and second partitions that cause current to flow along corresponding first and second directions that extend along a layer that includes said unit, and wherein said first direction extends along a first axis that, together with a second axis that is orthogonal to said first axis, defines a plane that is coplanar with said one of said first layer and said second layer.

12. The apparatus of claim 11 , further comprising an interconnection, wherein said interconnection is disposed between said first layer and said second layer.

13. The apparatus of claim 12 , further comprising solder bumps, wherein said interconnection is in contact with said solder bumps.

14. The apparatus of claim 11 , wherein said power converter circuit further comprises a via extending through at least one of said first layer and second layer.

15. The apparatus of claim 11 , wherein said first layer and said second layer are wafer bonded at said device faces thereof.

16. The apparatus of claim 11 , further comprising a data processing unit and a display unit, both of which are configured to consume power provided by said power converter circuit.

17. The apparatus of claim 11 , further comprising a data processing unit, a touch-screen interface, and a wireless transmitter and receiver, all of which are configured to consume power provided by said power converter circuit.

18. The apparatus of claim 11 , further comprising a driver and control unit to provide power and to control said active devices.

19. The apparatus of claim 11 , wherein said power converter circuit comprises a switch-mode power converter, wherein said switch-mode power converter is configured to regulate at least one of an output voltage and an output current by causing an energy storage element to be switched into different electrical configurations.

20. The apparatus of claim 11 , wherein said power converter circuit comprises a multi-level power converter, wherein said multi-level power converter comprises an inductor and a fly capacitor, wherein said active device is one of a plurality of active devices that cooperate to connect said inductor and said fly capacitor into different electrical configurations.

21. The apparatus of claim 11 , wherein said power converter circuit comprises a switched capacitor circuit, said switched capacitor circuit comprising a plurality of capacitors for use in energy transfer, and wherein said active device is one of a plurality of active devices that interconnect said capacitors and that cause said capacitors to transition between different configurations of capacitors.

22. The apparatus of claim 11 , wherein said active device comprises a transistor.

23. The apparatus of claim 11 , wherein said passive device comprises a trench capacitor.

24. The apparatus of claim 11 , wherein said first and second partitions are configured such that current flow along said second axis is lower than what said current flow along said second axis would have been had said unit consisted of only said first partition.

25. The apparatus of claim 11 , wherein said second direction has a component that is parallel to said first direction.

26. The apparatus of claim 11 , further comprising a multi-layer ceramic discrete capacitor.

27. An apparatus comprising a circuit, said circuit comprising a switched-capacitor circuit and a regulating circuit connected to said switched-capacitor circuit, said circuit comprising a partitioned unit, devices, and layers with said devices integrated therein, said layers defining a stack of layers, said stack of layers comprising a first layer having an active device integrated therein and a second layer having a passive device integrated therein, wherein said partitioned unit comprises a device integrated into one of said first and second layers, wherein said partitioned unit comprises terminals and partitions, each of which connects to corresponding terminals thereof.

28. The apparatus of claim 27 , wherein said partitioned unit comprises a partitioned device.

29. The apparatus of claim 28 , wherein said partitioned device comprises a partitioned passive device.

30. The apparatus of claim 29 , wherein partitioned passive device comprises a capacitor.

31. The apparatus of claim 28 , wherein said partitioned device comprises a partitioned active device.

32. The apparatus of claim 31 , wherein said partitioned active device comprises a switch.

33. The apparatus of claim 27 , wherein said partitioned unit comprises a partitioned switched-capacitor network.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE TYPOGRAPHICAL ERROR IN THE ASSIGNEE ADDRESS PREVIOUSLY RECORDED ON REEL 033019 FRAME 0076. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 15, 2023
From: GIULIANO, DAVID
To: ARCTIC SAND TECHNOLOGIES, INC.
Reel/Frame 064919/0391 →
CHANGE OF NAME Recorded Feb 1, 2018
From: PEREGRINE SEMICONDUCTOR CORPORATION
To: PSEMI CORPORATION
Reel/Frame 045221/0321 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 5, 2017
From: ARCTIC SAND TECHNOLOGIES, INC.
To: PEREGRINE SEMICONDUCTOR CORPORATION
Reel/Frame 043754/0354 →
RELEASE OF SECURITY INTEREST Recorded Apr 5, 2017
From: PACIFIC WESTERN BANK
To: ARCTIC SAND TECHNOLOGIES, INC.
Reel/Frame 041862/0180 →
SECURITY INTEREST Recorded May 11, 2016
From: ARCTIC SAND TECHNOLOGIES, INC.
To: PACIFIC WESTERN BANK
Reel/Frame 038549/0966 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2014
From: GIULIANO, DAVID
To: ARCTIC SAND TECHNOLOGIES, INC.
Reel/Frame 033019/0076 →
Continuity (3)
Division 13654113 · Oct 17, 2012
Provisional Application 61548360 · Oct 18, 2011
Related Publication 20140301057A1 · Oct 9, 2014