IP Library Granted Patent US 9,264,218
Granted Patent B2
US 9,264,218 · App. 14/301,190 · Granted Feb 16, 2016

Rising and falling edge detection and re-assembly for high speed serial data communications

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Quick Facts
Patent No.
US 9,264,218
App. No.
14/301,190
Granted
Feb 16, 2016
Kind
B2
Abstract

A method according to one embodiment includes receiving a serialized data stream; detecting rising and falling edges in the serialized data stream; correlating the rising and falling edges to data values using a clock signal that is not derived from the serialized data stream; and converting the serialized data stream to a parallel data stream. In a further embodiment a system includes a processor and logic integrated with and/or executable by the processor. The logic is configured to receive a serialized data stream; detect rising and falling edges in the serialized data stream; correlate the rising and falling edges to data values using a clock signal that is not derived from the serialized data stream; and convert the serialized data stream to a parallel data stream.

Claims (33)

1. A method, comprising:

receiving a serialized data stream;

detecting rising and falling edges in the serialized data stream;

correlating the rising and falling edges to data values using a clock signal that is not derived from the serialized data stream; and

converting the serialized data stream to a parallel data stream.

2. The method of claim 1 , wherein the clock signal is derived from a local clock.

3. The method of claim 1 , wherein the clock signal is derived from a clock on a remote device sending the serialized data stream.

4. The method of claim 1 , wherein the serialized data stream is received from a serial link having a differential pair.

5. The method of claim 1 , wherein the correlating the rising and falling edges to data values using the clock signal includes determining a number of intervals between the detected edges, each interval corresponding to a predefined period derived from the clock signal.

6. The method of claim 5 , wherein the types of edges and the number of intervals between the edges are stored in a table, the table being used to deserialize the data stream.

7. The method of claim 5 , wherein a second edge of a same type detected within less than 50% of one interval is ignored.

8. The method of claim 5 , invoking a bit error recovery algorithm when two consecutive edges of the same type are detected within greater than or equal to one interval.

9. A system, comprising:

a processor and logic integrated with and/or executable by the processor, the logic being configured to:

receive a serialized data stream;

detect rising and falling edges in the serialized data stream;

correlate the rising and falling edges to data values using a clock signal that is not derived from the serialized data stream; and

convert the serialized data stream to a parallel data stream.

10. The system of claim 9 , wherein the clock signal is derived from a local clock.

11. The system of claim 9 , wherein the clock signal is derived from a clock on a remote device sending the serialized data stream.

12. The system of claim 9 , wherein the serialized data stream is received from a serial link having a differential pair.

13. The system of claim 9 , wherein the correlating the rising and falling edges to data values using the clock signal includes determining a number of intervals between the detected edges, each interval corresponding to a predefined period derived from clock signal.

14. The system of claim 13 , wherein the types of edges and the number of intervals between the edges are stored in a table, the table being used to deserialize the data stream.

15. The system of claim 13 , wherein a second edge of a same type is detected within less than 50% of one interval is ignored.

16. The system of claim 13 , invoking a bit error recovery algorithm when two consecutive edges of the same type are detected within greater than or equal to one interval.

17. A computer program product, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions readable and or executable by a device to cause the device to perform a method comprising:

receiving a serialized data stream;

detecting rising and falling edges in the serialized data stream;

correlating the rising and falling edges to data values using a clock signal that is not derived from the serialized data stream; and

converting the serialized data stream to a parallel data stream.

18. The computer program product of claim 17 , wherein the clock signal is derived from a local clock.

19. The computer program product of claim 17 , wherein the clock signal is derived from a clock on a remote device sending the serialized data stream.

20. The computer program product of claim 17 , wherein the serialized data stream is received from a serial link having a differential pair.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2019
From: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE LTD.
To: LENOVO INTERNATIONAL LIMITED
Reel/Frame 050301/0033 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2016
From: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
To: LENOVO INTERNATIONAL LIMITED
Reel/Frame 038483/0940 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
Reel/Frame 034194/0111 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2014
From: MENG, JIAN
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 033070/0747 →