System and method for managing execution of internal commands and host commands in a solid-state memory
View Patent ↗Embodiments of the invention are directed to enable simultaneous or nearly simultaneous execution of internal and host-issued commands in a non-volatile storage subsystem while maintaining data consistency. Embodiments maintain validity information on data residing at physical addresses as well as logical to physical address mappings in the solid-state storage subsystem. In one embodiment, a controller within the storage subsystem selectively cancels internal commands that it determines to be writing data that has been rendered invalid by another command. In one embodiment, the determination is made by consulting the validity information kept by the controller in an invalid page table.
1. A method of managing memory operations in solid-state memory, the method comprising:
accessing an internal command and a host command scheduled to be executed at least partially in parallel; wherein the internal command is a multipart command comprising at least a first portion and a second portion capable of being executed separately from the first portion;
executing the first portion of the internal command, wherein executing the first portion of the internal command comprises accessing a physical page address;
executing the host command prior to execution of the second portion of the internal command, wherein executing the host command comprises accessing the physical page address;
determining whether the host command has modified data stored at the physical page address; and
responsive to determining that the host command has modified the data stored at the physical page address, cancelling execution of the second portion of the internal command.
2. The method of claim 1 , wherein the first portion of the internal command comprises a read command.
3. The method of claim 1 , wherein the second portion of the internal command comprises a write command.
4. The method of claim 1 , wherein determining whether the host command has modified the data stored at the physical page address comprises determining whether an invalid page table indicates that the data stored at the physical page address has been invalidated.
5. The method of claim 4 , wherein the invalid page table is implemented as a bitmask.
6. The method of claim 1 , wherein the host command and the internal command are stored in a single queue.
7. The method of claim 1 , wherein the host command is stored in a first queue and the internal command is stored in a second queue.
8. The method of claim 7 , wherein host commands stored in the first queue and internal commands stored in the second queue are at least partially executed concurrently.
9. A storage sub-system comprising:
a non-volatile memory; and
a controller configured to:
access an internal command and a host command scheduled to be executed at least partially in parallel; wherein the internal command is a multi-part command comprising at least a first portion and a second portion capable of being executed separately from the first portion;
execute the first portion of the internal command, wherein executing the first portion of the internal command comprises accessing a physical page address;
execute the host command prior to execution of the second portion of the internal command, wherein executing the host command comprises accessing the physical page address;
determine whether the host command has modified data stored at the physical page address; and
responsive to determining that the host command has modified the data stored at the physical page address, cancel execution of the second portion of the internal command.
10. The storage sub-system of claim 9 , wherein the first portion of the internal command comprises a read command.
11. The storage sub-system of claim 9 , wherein the second portion of the internal command comprises a write command.
12. The storage sub-system of claim 9 , wherein the controller is further configured to determine whether the host command has modified the data stored at the physical page address by determining whether an invalid page table indicates that the data stored at the physical page address has been invalidated.
13. The storage sub-system of claim 12 , wherein the invalid page table is implemented as a bitmask.
14. The storage sub-system of claim 9 , further comprising a queue configured to store the host command and the internal command.
15. The storage sub-system of claim 14 , wherein the queue is maintained by the controller.
16. The storage sub-system of claim 9 , further comprising a first queue configured to store the host command and a second queue configured to store the internal command.
17. The storage sub-system of claim 16 , wherein host commands stored in the first queue and internal commands stored in the second queue are at least partially executed concurrently.
18. The storage sub-system of claim 16 , wherein the first queue and the second queue are maintained by the controller.
19. The storage sub-system of claim 9 , wherein the non-volatile memory comprises a solid-state non-volatile memory.