IP Library Granted Patent US 10,036,783
Granted Patent B1
US 10,036,783 · App. 14/303,910 · Granted Jul 31, 2018

Device testing systems and methods

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Quick Facts
Patent No.
US 10,036,783
App. No.
14/303,910
Granted
Jul 31, 2018
Kind
B1
Abstract

Systems and methods for testing a Device Under Test (DUT). A test condition is randomly selected from a plurality of test conditions to test the DUT. The DUT is controlled to attempt to output an output condition matching the randomly selected test condition and an operator is prompted to confirm that the output condition matches the randomly selected test condition.

Claims (39)

1. A test system for testing an electronic Device Under Test (DUT), the test system comprising:

a device interface for communicating with the electronic DUT;

a display for prompting an operator input from an operator of the test system, the operator input indicating an output condition of the electronic DUT; and

a processor configured to:

randomly select a test condition from a plurality of test conditions to test the electronic DUT, wherein the randomly selected test condition is a visual output condition of at least one of a Liquid Crystal Display (LCD), a Light Emitting Diode (LED), and an LED display;

control the electronic DUT using the device interface to attempt to output a visual output condition on at least one of an LCD, an LED, and an LED display of the DUT matching the randomly selected test condition; and

prompt the operator input on the display to confirm that the output condition of the electronic DUT matches the randomly selected test condition.

2. The test system of claim 1 , further comprising an operator interface for receiving the operator input, and wherein the processor is further configured to:

receive the operator input using the operator interface; and

compare the output condition indicated by the operator input with the randomly selected test condition.

3. The test system of claim 2 , wherein the processor is further configured to:

indicate that the electronic DUT fails a quality assurance test if the output condition indicated by the operator input does not match the randomly selected test condition; and

indicate that the electronic DUT passes the quality assurance test if the output condition indicated by the operator input matches the randomly selected test condition.

4. The test system of claim 1 , wherein the output condition indicated by the operator input indicates that the electronic DUT did not output a test condition.

5. The test system of claim 1 , wherein the processor is further configured to prompt the operator input by indicating on the display at least two test conditions of the plurality of test conditions for the operator to select one of the at least two test conditions that matches the output condition.

6. A method for testing an electronic Device Under Test (DUT), the method comprising:

randomly selecting a test condition from a plurality of test conditions to test the electronic DUT, wherein the randomly selected test condition is a visual output condition of at least one of a Liquid Crystal Display (LCD), a Light Emitting Diode (LED), and an LED display;

controlling the electronic DUT to attempt to output a visual output condition on at least one of an LCD, an LED, and an LED display of the DUT matching the randomly selected test condition; and

prompting an operator input to confirm that the output condition matches the randomly selected test condition.

7. The method of claim 6 , further comprising:

receiving the operator input indicating the output condition of the electronic DUT; and

comparing the output condition indicated by the operator input with the randomly selected test condition.

8. The method of claim 7 , further comprising:

indicating that the electronic DUT fails a quality assurance test if the output condition indicated by the operator input does not match the randomly selected test condition; and

indicating that the electronic DUT passes the quality assurance test if the output condition indicated by the operator input matches the randomly selected test condition.

9. The method of claim 6 , further comprising receiving an operator input indicating that the electronic DUT did not output a test condition.

10. The method of claim 6 , further comprising prompting the operator by indicating on a display at least two test conditions of the plurality of test conditions for the operator to select one of the at least two test conditions that matches the output condition.

11. A non-transitory computer readable storage medium storing computer-executable instructions for testing an electronic Device Under Test (DUT), wherein when the computer-executable instructions are executed by a processor, the computer-executable instructions cause the processor to:

randomly select a test condition from a plurality of test conditions to test the electronic DUT, wherein the randomly selected test condition is a visual output condition of at least one of a Liquid Crystal Display (LCD), a Light Emitting Diode (LED), and an LED display;

control the electronic DUT to attempt to output a visual or sound output condition matching the randomly selected test condition on at least one of an LCD, an LED, and an LED display of the DUT; and

prompt an operator input to confirm that the output condition matches the randomly selected test condition.

12. The non-transitory computer readable medium of claim 11 , wherein when the computer-executable instructions are executed by the processor, the computer-executable instructions further cause the processor to:

receive the operator input indicating the output condition of the electronic DUT; and

compare the output condition indicated by the operator input with the randomly selected test condition.

13. The non-transitory computer readable medium of claim 11 , wherein when the computer-executable instructions are executed by the processor, the computer-executable instructions further cause the processor to:

indicate that the electronic DUT fails a quality assurance test if the output condition indicated by the operator input does not match the randomly selected test condition; and

indicate that the electronic DUT passes the quality assurance test if the output condition indicated by the operator input matches the randomly selected test condition.

14. The non-transitory computer readable medium of claim 11 , wherein when the computer-executable instructions are executed by the processor, the computer-executable instructions further cause the processor to receive an operator input indicating that the electronic DUT did not output a test condition.

15. The non-transitory computer readable medium of claim 11 , wherein when the computer-executable instructions are executed by the processor, the computer-executable instructions further cause the processor to prompt the operator by indicating on a display at least two test conditions of the plurality of test conditions for the operator to select one of the at least two test conditions that matches the output condition.

Assignments (8)
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2014
From: STILL, DAVID N.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 033781/0639 →