Reducing detectability of an encryption key
View Patent ↗Methods and systems are provided for reducing detectability of encryption keys, which may be used to encrypt messages transmitted in a network (e.g., between a base station and a mobile station, such as over the air). Random bit errors may be introduced into the messages to artificially lowering transmission quality, thus makes it harder to detect the encryption key from well-known messages. The random bit errors may be introduced by inverting one or more randomly selected bits in the encrypted message prior to transmitting.
1. A method of reducing detectability of an encryption key used to encrypt a message, the method comprising:
selecting one or more bits in an encrypted message; and
inverting the one or more selected bits in the encrypted message prior to transmitting to introduce random bit errors;
wherein the one or more bits are selected such that in the message there is no sequence of consecutive bits, having a length that is greater than or equal to a defined threshold value, that is free of bit errors.
2. The method of claim 1 , wherein the one or more selected bits are determined at a physical layer.
3. The method of claim 1 , wherein the message is a known control message.
4. The method of claim 1 , wherein:
the message is a physical layer data frame encoding a data link layer control frame, and
the one or more selected bits are determined at random positions in the physical layer data frame.
5. The method of claim 1 , wherein the one or more selected bits are corrected at a receiver-side device by use of forward error correction.
6. The method of claim 1 , wherein:
inverting one or more selected bits in the encrypted message reduces detectability of an encryption key used in a GSM network to encrypt messages at a base station that uses an A5/1 cipher protocol; and
the one or more selected bits are determined by the base station at random positions in a physical layer data frame encoding a data link layer control frames.
7. The method of claim 1 , comprising determining the one or more selected bits so that the message contains at least one random bit error within any sequence of consecutive bits having a particular length.
8. The method of claim 7 , comprising adjusting the particular length based on a desired lowered quality of transmission.
9. A system to reduce detectability of an encryption key used to encrypt a message in a communication device, the system comprising:
one or more circuits for use in the communication device, the one or more circuits being operable to:
select one or more bits in an encrypted message; and
invert the one or more selected bits in the encrypted message prior to transmitting to introduce random bit errors
wherein the one or more bits are selected such that in the message there is no sequence of consecutive bits, having a length that is greater than or equal to a defined threshold value, that is free of bit errors.
10. The system of claim 9 , wherein the one or more circuits are operable to determine the one or more selected bits at a physical layer.
11. The system of claim 9 , wherein the message is a known control message.
12. The system of claim 9 , wherein:
the message is a physical layer data frame encoding a data link layer control frame; and
the one or more circuits are operable to determine the one or more selected bits at random positions in the physical layer data frame.
13. The system of claim 9 , wherein the one or more selected bits are corrected at a receiver-side device by use of forward error correction.
14. The system of claim 9 , wherein:
the communication device comprises a base station that is configurable to use an A5/1 cipher protocol;
inverting one or more selected bits in the encrypted message reduces detectability of an encryption key used in a GSM network, associated with the base station, to encrypt messages; and
the one or more circuits are operable to determine the one or more selected bits at random positions in a physical layer data frame encoding a data link layer control frames.
15. The system of claim 9 , wherein the one or more circuits are operable to determine the one or more selected bits so that the message contains at least one random bit error within any sequence of consecutive bits having a particular length.
16. The system of claim 15 , wherein the one or more circuits are operable to adjust the particular length based on a desired lowered quality of transmission.