IP Library Granted Patent US 9,685,335
Granted Patent B2
US 9,685,335 · App. 14/316,248 · Granted Jun 20, 2017

Power device including a field stop layer

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Quick Facts
Patent No.
US 9,685,335
App. No.
14/316,248
Granted
Jun 20, 2017
Kind
B2
Abstract

Provided are a power device having an improved field stop layer and a method of manufacturing the same. The power device includes: a first field stop layer formed of a semiconductor substrate and of a first conductive type; a second field stop layer formed on the first field stop layer and of the first conductive type, the second field stop layer having a region with an impurity concentration higher than the first field stop layer; a drift region formed on the second field stop layer and of the first conductive type, the drift region having an impurity concentration lower than the first field stop layer; a plurality of power device cells formed on the drift region; and a collector region formed below the first field stop layer, wherein the second field stop layer includes a first region having a first impurity concentration and a second region having a second impurity concentration higher than the first impurity concentration.

Claims (33)

1. A power device comprising:

a first field stop layer of a first conductive type;

a second field stop layer formed on the first field stop layer and of the first conductive type, the second field stop layer having a region with an impurity concentration higher than the first field stop layer;

a drift region formed on the second field stop layer and of the first conductive type, the drift region having an impurity concentration lower than the first field stop layer;

a plurality of power device cells formed on the drift region; and

a collector region formed below the first field stop layer,

the second field stop layer including a first region having a first impurity concentration and a second region having a second impurity concentration higher than the first impurity concentration, the first region being laterally oriented with respect to and in contact with the second region,

the first region having an impurity concentration gradient that increases along a vertical direction of the second field stop layer from an interface of the first region with the drift region to a first maximum impurity concentration and that decreases along the vertical direction from the first maximum impurity concentration to an interface of the first region with the first field stop layer, and

the second region having an impurity concentration gradient that increases along the vertical direction of the second field stop layer from an interface of the second region with the drift region to a second maximum impurity concentration and that decreases along the vertical direction from the second maximum impurity concentration to an interface of the second region with the first field stop layer, wherein the first maximum impurity concentration is different than the second maximum impurity concentration.

2. The power device of claim 1 , wherein an average impurity concentration of the second region is higher than that of the first region.

3. The power device of claim 1 , wherein the first region and the second region are alternately disposed along a horizontal direction.

4. The power device of claim 1 , wherein the second region surrounds the first region at a constant depth.

5. The power device of claim 1 , wherein the plurality of power device cells are formed on the first region.

6. The power device of claim 5 , further comprising an edge termination structure on the drift region and on the second region, the edge termination structure surrounding the plurality of power device cells.

7. The power device of claim 1 , wherein the collector region is of a second conductive type that is different from the first conductive type.

8. The power device of claim 1 , wherein the collector region includes a first collector region of the first conductive type and a second collector region of a second conductive type that is different from the first conductive type.

9. The power device of claim 8 , wherein some of the plurality of power device cells are formed on the first region and a remainder of the plurality of power device cells are formed on the second region.

10. The power device of claim 1 , wherein the first field stop layer and the drift region each have a uniform impurity concentration profile in a depth direction.

11. The power device of claim 1 , wherein the first field stop layer is formed by grinding a rear surface of a Czochralski (CZ) single crystal substrate.

12. The power device of claim 1 , wherein the drift region is formed on the second field stop layer via an epitaxial growth.

13. The power device of claim 1 , wherein the second field stop layer is formed with a higher impurity concentration than the first field stop layer via an ion implant process.

14. The power device of claim 13 , wherein the second field stop layer is formed with the first impurity concentration via a first ion implant process, and the second region is formed with the second impurity concentration via a second ion implant process.

15. The power device of claim 1 , wherein each of the plurality of power device cells includes:

a base region disposed on the drift region and of a second conductive type that is different from the first conductive type;

an emitter region disposed on a surface portion in the base region and of the first conductive type; and

a gate electrode formed adjacent the drift region, the base region, and the emitter region such that a gate insulating layer is disposed between the gate electrode and each of the drift region, the base region, and the emitter region.

16. The power device of claim 1 , wherein each of the plurality of power device cells includes:

a base region disposed on the drift region and of a second conductive type that is different from the first conductive type;

an emitter region disposed on a surface portion in the base region and of the first conductive type;

a gate electrode disposed at one of a plurality of side surfaces of the base region and the emitter region, and embedded in the drift region; and

a gate insulating layer disposed between the gate electrode and each of the base region, the emitter region, and the drift region.

17. The power device of claim 3 , wherein the first region has a thickness that is the same as a thickness of the second region.

18. The power device of claim 1 , wherein the first maximum impurity concentration is higher than the second maximum impurity concentration.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 04481, FRAME 0541 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0459 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2017
From: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 044361/0205 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2014
From: LEE, KYU-HYUN; KIM, YOUNG-CHUL; PARK, KYEONG-SEOK; LEE, BONG-YONG; CHOI, YOUNG-CHUL
To: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
Reel/Frame 033671/0035 →