IP Library Granted Patent US 9,298,309
Granted Patent B2
US 9,298,309 · App. 14/318,837 · Granted Mar 29, 2016

Source driver touch transmitter in parallel with display drive

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Quick Facts
Patent No.
US 9,298,309
App. No.
14/318,837
Granted
Mar 29, 2016
Kind
B2
Abstract

Various embodiments enable driving one or more sub-pixels with a source voltage while concurrently modulating the voltage of one or more common electrodes coupled to the sub-pixels to perform input sensing with the common electrodes. The voltage driven onto the sub-pixel may be shifted while the common electrode is modulated by a value about equal to about the amplitude of the modulation applied to the common electrode. Thus, the potential difference between the source line and common electrode remains substantially unchanged so that display asperities are not introduced while input sensing while concurrently updating a sub-pixel with display information. Thus, the common electrode(s) may be modulated for input sensing without interfering with display updating of the one or more sub-pixels, greatly increasing the amount of time available for performing input sensing and/or display updating.

Claims (67)

1. A processing system for a display device integrated with a capacitive sensing device, the processing system comprising:

a driver module comprising driver circuitry, the driver module configured for coupling to a sub-pixel with a first source line and a first common electrode, wherein the driver module is configured to:

update the sub-pixel by driving the first source line to a first voltage;

drive the first common electrode for capacitive sensing by modulating the first common electrode between a second voltage and a third voltage; and

shift the first voltage driven onto the first source line while the first common electrode is modulated between the second voltage and the third voltage by a value about equal to a difference between the second voltage and the third voltage;

a receiver module coupled to a plurality of receiver electrodes configured to receive resulting signals with the receiver electrodes while the first common electrode is modulated between the second voltage and the third voltage; and

wherein the processing system is configured to determine positional information based on the resulting signals.

2. The processing system of claim 1 , wherein the driver module is further configured to:

drive the first common electrode for capacitive sensing while a gate line associated with the sub-pixel is driven at a steady state voltage.

3. The processing system of claim 1 , wherein the driver module is further configured to:

drive the first common electrode at a steady state voltage while voltage driven on a gate line associated with the sub-pixel is changing.

4. The processing system of claim 1 , wherein the driver module is further configured to:

drive the first common electrode to the second voltage that is greater than the third voltage.

5. The processing system of claim 1 , wherein the driver module is further configured to:

drive the first common electrode to the second voltage that is less than the third voltage.

6. The processing system of claim 1 , wherein the driver module comprises:

a digital to analog converter (DAC) having an output configured to provide the first voltage to the sub-pixel, wherein the DAC has an operating voltage range of at least about 10 VDC.

7. The processing system of claim 1 , wherein the driver module comprises:

a digital to analog converter (DAC) having an output configured to provide the first voltage to the sub-pixel;

a first switch operable to selectively toggle a VDD input of the DAC between a high value and low value; and

a second switch operable to selectively toggle a reference voltage input of the DAC between a high value and a low value, wherein each of the first switch and the second switch toggle substantially simultaneously from the high value to the low value.

8. The processing system of claim 1 , wherein the driver module comprises:

a digital to analog converter (DAC) having an output coupled to an output buffer;

a first switch operable to selectively toggle a VDD input to the DAC and output buffer between a high value and low value; and

a second switch operable to selectively toggle a reference voltage input to the DAC and output buffer between a high value and a low value, wherein each of the first switch and the second which toggle substantially simultaneously from the high value to the low value.

9. The processing system of claim 1 , wherein the driver module comprises:

a first digital to analog converter (DAC) configured to output the first voltage;

a second DAC having configured to output the third voltage; and

a switch operable to selectively couple one of the first DAC and the second DAC to the sub-pixel.

10. A method of capacitive sensing with a display device integrated with a capacitive sensing device having a sub-pixel, a first source line coupled to the sub-pixel, a first common electrode coupled to the sub-pixel, and a plurality of receiver electrodes, the method comprising:

simultaneously updating the sub-pixel and driving the first common electrode for capacitive sensing by:

driving the first source line with a first voltage to update the sub-pixel;

driving the first common electrode for capacitive sensing by modulating the first common electrode between a second voltage and a third voltage; and

shifting a value of the first voltage driven onto the first source line while the first common electrode is modulated between the second voltage and the third voltage by an amount equal to about a difference between the second voltage and the third voltage;

receiving resulting signals with the receiver electrodes while the first common electrode is modulated between the second voltage and the third voltage; and

determining positional information based on the resulting signals.

11. The method of claim 10 further comprising:

driving the first common electrode for capacitive sensing while a gate line associated with the sub-pixel is driven at a steady state voltage.

12. The method of claim 10 further comprising:

driving the first common electrode at a steady state voltage while voltage driven on a gate line associated with the sub-pixel is changing.

13. The method of claim 10 further comprising:

driving the first common electrode to the second voltage that is greater than the third voltage.

14. The method of claim 10 further comprising:

driving the first common electrode to the second voltage that is less than the third voltage.

15. The method of claim 10 further comprising:

providing a differential voltage of at least about 10 VDC across high and ground inputs of a digital to analog converter (DAC) providing the first voltage to the sub-pixel.

16. The method of claim 10 further comprising:

toggling a VDD input of an analog to digital converter (DAC) providing first voltage to the sub-pixel between a high value and low value; and

toggling a reference voltage input of the DAC between a high value and low value digital substantially simultaneously with the toggling of the VDD input from the high value to the low value.

17. The method of claim 10 further comprising:

switching VDD inputs of a digital to analog converter (DAC) and an output buffer coupled to the DAC between a high value and low value; and

switching reference voltage inputs of the DAC and the output buffer between a high value and low value from the high value to the low value substantially simultaneously with the switching of the VDD input from the high value to the low value.

18. The method of claim 10 further comprising:

outputting the first voltage from a first digital to analog converter (DAC) configured;

outputting the third voltage from a second DAC; and

switching an output of one of the first DAC and second DAC to the sub-pixel.

19. An input device comprising:

a plurality of source lines;

a plurality of common electrodes; and

a processing system configured for coupling to a sub-pixel with a first source line of the plurality of source lines and a first common electrode of the plurality of common electrodes, wherein the processing system is configured to:

update the sub-pixel by driving the first source line to a first voltage;

drive the first common electrode for capacitive sensing by modulating the first common electrode between a second voltage and a third voltage while a gate line associated with the sub-pixel is driven at a steady state voltage;

shift the first voltage driven onto the first source line while the first common electrode is modulated between the second voltage and the third voltage by a value about equal to a difference between the second voltage and the third voltage;

receive resulting signals with the receiver electrodes while the first common electrode is modulated between the second voltage and the third voltage; and

a processing system configured to determine positional information based on the resulting signals.

20. The input device of claim 19 , wherein the input device is further configured to:

drive the first common electrode at a steady state voltage while voltage driven on a gate line associated with the sub-pixel is changing.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2021
From: CREATIVE LEGEND SEMICONDUCTOR (HONG KONG) LIMITED
To: OMNIVISION TDDI ONTARIO LIMITED PARTNERSHIP
Reel/Frame 058035/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2020
From: SYNAPTICS INCORPORATED
To: CREATIVE LEGEND SEMICONDUCTOR (HONG KONG) LIMITED
Reel/Frame 052457/0740 →
RELEASE OF SECURITY INTEREST Recorded Apr 20, 2020
From: WELLS FARGO BANK, NATIONAL ASSOCIATION
To: SYNAPTICS INCORPORATED
Reel/Frame 052441/0289 →
SECURITY INTEREST Recorded Sep 27, 2017
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 044037/0896 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 1, 2015
From: MOREIN, STEPHEN L.; BELL, MARSHALL J., JR.
To: SYNAPTICS INCORPORATED
Reel/Frame 036702/0851 →
SECURITY INTEREST Recorded Oct 3, 2014
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 033889/0039 →