IP Library Granted Patent US 9,166,704
Granted Patent B1
US 9,166,704 · App. 14/323,254 · Granted Oct 20, 2015

Integrated control for silicon photonics

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Quick Facts
Patent No.
US 9,166,704
App. No.
14/323,254
Filed
Jul 3, 2014
Granted
Oct 20, 2015
Kind
B1
Art Unit
2634
USPC
398/192
Abstract

In an example, the present invention includes an integrated system on chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. In an example, the device has a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device. The device also has an interface configured to communicate between the silicon photonics device and the control block.

Claims (64)

1. A monolithically integrated system on chip device, the device comprising:

a single silicon substrate member;

a data input/output interface provided on the substrate member and configured for a predefined data rate and protocol;

an input/output block provided on the substrate member and coupled to the data input/output interface, the input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block;

a signal processing block provided on the substrate member and coupled to the input/output block, the signal processing block configured to the input/output block using a bi-direction bus in an intermediary protocol;

a driver module provided on the substrate member and coupled to the signal processing block, the driver module coupled to the signal processing block using a uni-directional multi-lane bus;

a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device, the driver interface being configured to transmit output data in either an amplitude modulation format or a combination of phase/amplitude modulation format or a phase modulation format;

a receiver module comprising a TIA block provided on the substrate member and to be coupled to the silicon photonics device using predefined modulation format, and configured to the signal processing block to communicate information to the input/output block for transmission through the data input/output interface;

a communication block provided on the substrate member and operably coupled to the input/output block, the signal processing block, the driver block, and the receiver block;

a communication interface coupled to the communication block;

a control block provided on the substrate member and coupled to the communication block;

a control interface provided to communicate between the control block and the silicon photonics device, the control interface comprising:

a modulator bias voltage input;

a laser DC bias current input;

a photocurrent or set output;

a power monitor current/voltage output;

a photodetector bias input;

a heater current/voltage input;

a photocurrent from input signal or set output;

a wavelength monitor voltage/current/resistance output.

2. The device of claim 1 wherein the signal processing block comprises a FEC block, a digital signal processing block, a framing block, a protocol block, and a redundancy block.

3. The device of claim 1 wherein the driver module is selected from a current drive or a voltage driver.

4. The device of claim 1 wherein the driver module is a differential driver.

5. The device of claim 1 wherein the amplified modulation format is selected from NRZ format or PAM format.

6. The device of claim 1 wherein the phase modulation format is selected from BPSK or nPSK.

7. The device of claim 1 wherein the signal processing block comprises a FEC block, a digital signal processing block, a framing block, a protocol block, and a redundancy block; wherein the amplified modulation format is a PAM format.

8. The device of claim 1 wherein the phase/amplitude modulation is QAM.

9. The device of claim 1 wherein the silicon photonic device is configured to convert the output data into an output transport data in a WDM signal.

10. The device of claim 1 wherein the control block is configured to initiate a laser bias or a modulator bias.

11. The device of claim 1 wherein the control block is configured for laser bias and power control of the silicon photonics device.

12. The device of claim 1 wherein the control block is configured with a thermal tuning or carrier tuning device each of which is configured on the silicon photonics device.

13. The device of claim 1 wherein the SerDes block is configured to convert a first data stream of N into a second data stream of M.

14. A monolithically integrated system on chip device, the device comprising:

a single silicon substrate member;

a data input/output interface provided on the substrate member and configured for a predefined data rate and protocol;

an input/output block provided on the substrate member and coupled to the data input/output interface;

a signal processing block provided on the substrate member and coupled to the input/output block, the signal processing block configured to the input/output block using a bi-direction bus in an intermediary protocol;

a driver module provided on the substrate member and coupled to the signal processing block, the driver module coupled to the signal processing block using a uni-directional multi-lane bus;

a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device, the driver interface being configured to transmit output data in either an amplitude modulation format or a combination of phase/amplitude modulation format or a phase modulation format;

a receiver module comprising a TIA block provided on the substrate member and to be coupled to the silicon photonics device using predefined modulation format, and configured to the signal processing block to communicate information to the input/output block for transmission through the data input/output interface;

a communication block provided on the substrate member and operably coupled to the input/output block, the signal processing block, the driver block, and the receiver block;

a communication interface coupled to the communication block;

a control block provided on the substrate member and coupled to the communication block;

a control interface provided to communicate between the control block and the silicon photonics device, the control interface comprising:

a modulator bias voltage input;

a laser DC bias current input;

a photocurrent or set output;

a power monitor current/voltage output;

a photodetector bias input;

a heater current/voltage input;

a photocurrent from input signal or set output;

a wavelength monitor voltage/current/resistance output.

15. The device of claim 14 wherein the signal processing block comprises a FEC block, a digital signal processing block, a framing block, a protocol block, and a redundancy block; and the input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block; wherein the interface is configured on the silicon photonics device.

16. The device of claim 15 wherein the driver module is selected from a current drive or a voltage driver.

17. The device of claim 15 wherein the driver module is a differential driver.

18. The device of claim 15 wherein the amplified modulation format is selected from NRZ format or PAM format.

19. The device of claim 15 wherein the phase modulation format is selected from BPSK or nPSK.

20. The device of claim 15 wherein the signal processing block comprises a FEC block, a digital signal processing block, a framing block, a protocol block, and a redundancy block; wherein the amplified modulation format is a PAM format.

21. The device of claim 15 wherein the phase/amplitude modulation is QAM.

22. The device of claim 15 wherein the silicon photonic device is configured to convert the output data into an output transport data in a WDM signal.

23. The device of claim 15 wherein the control block is configured to initiate a laser bias or a modulator bias.

24. The device of claim 15 wherein the control block is configured for laser bias and power control of the silicon photonics device.

25. The device of claim 15 wherein the control block is configured with a thermal tuning or carrier tuning device each of which is configured on the silicon photonics device.

26. The device of claim 15 wherein the SerDes block is configured to convert a first data stream of N into a second data stream of M.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 17, 2014
From: NAGARAJAN, RADHAKRISHNAN L.
To: INPHI CORPORATION
Reel/Frame 033337/0182 →