Analog-to-digital converter with redundancy for image sensor readout
Methods and systems for analog-to-digital conversion applicable to an image sensor, such as a CMOS image sensor, in which an ADC comprises built-in redundancy such that the ADC can start its conversion cycle before the ADC input settles to a desired resolution and the ADC can yet accurately convert the ADC input to a digital value with the desired resolution. In a CMOS image sensor, such an ADC configuration enables the pixel readout time to overlap with the ADC conversion time, reducing the total time needed to convert the pixel signal value to a digital value with the desired resolution.
1. An image sensor comprising:
an array of pixels; and
at least one analog-to-digital converter (ADC) configured for converting an analog pixel signal corresponding to photocarriers accumulated by a given selected pixel of the pixel array into an N bit digital signal, each said at least one analog-to-digital converter comprising:
an input configured to sample the analog pixel signal;
conversion circuitry configured (i) to begin analog-to-digital conversion of the analog pixel signal at said input prior to the analog pixel signal settling to within N-bit resolution, and (ii) to correct the analog-to-digital conversion for error caused by the analog-to-digital conversion beginning prior to the analog pixel signal at said input settling, such that the analog-to-digital conversion provides an output digital signal that accurately represents the analog pixel signal within N-bit resolution.
2. The image sensor according to claim 1 , wherein the conversion circuitry comprises (i) coarse conversion circuitry to determine m most-significant bits (m<N) of the N bit digital signal, and (ii) fine conversion circuitry to determine n least-significant bits (n+m≧N) and to correct for any error in at least one of the m most-significant bits.
3. The image sensor according to claim 2 , wherein the coarse and fine conversions provide at least one overlapping or redundant bit, such that n+m>N.
4. The image sensor according to claim 2 , wherein the ADC is a hybrid ADC, the coarse conversion comprises a SAR ADC, and the fine conversion circuitry comprises a ramp ADC.
5. The image sensor according to claim 1 , wherein the ADC comprises a redundant SAR ADC.
6. The image sensor according to claim 4 , wherein the redundant SAR ADC comprises a binary-weighted capacitor bank and includes at least one redundant capacitor.
7. The image sensor according to claim 1 , wherein each pixel comprises a transfer gate operable to selectively cause intrapixel transfer of accumulated photocarriers from a charge accumulation node to a charge storage node, and wherein the conversion circuitry is configured to begin analog-to-digital conversion of the analog pixel signal during intrapixel transfer of accumulated photocarriers to the charge storage node, while the transfer gate is asserted to cause the intrapixel transfer.
8. The image sensor according to claim 6 , wherein the charge accumulation node is a region of a pinned photodiode, and the charge storage region comprises a floating diffusion.
9. A method for conversion of an analog pixel signal read out of an image sensor pixel into a digital value of N-bit resolution, the method comprising:
initiating conversion of the analog pixel signal read out of the pixel to generate at least one digital value before the analog pixel signal settles to within N-bit resolution; and
completing conversion of the analog pixel signal after the analog pixel signal settles to within N-bit resolution, to provide N bits representing the analog pixel signal, wherein settling error is compensated for based on redundancy in the conversion.
10. The method according to claim 9 , wherein the method comprises:
performing a coarse conversion on the analog pixel signal before the analog pixel signal settles to within N-bit resolution, to determine m most-significant bits (m<N) of the N-bit digital signal; and
after the analog pixel signal settles to within N-bit resolution, performing a fine conversion on the readout of the selected pixel to determine the n least-significant bits (n+m≧N).
11. The method according to claim 10 , wherein the coarse conversion is performed by a SAR A/D converter.
12. The method according to claim 11 , wherein the fine conversion is performed by a ramp A/D converter.
13. The method according to claim 12 , wherein the SAR A/D converter and the ramp A/D converter are configured as a hybrid A/D converter comprising common control circuitry and a common comparator circuit.
14. The method according to claim 10 , wherein m is at least three and n is at least 8.
15. The method according to claim 9 , wherein the conversion is performed by a redundant SAR ADC.
16. The method according to claim 15 , wherein the redundant SAR ADC comprises a binary-weighted capacitor bank and includes at least one redundant capacitor.
17. An image sensor comprising an A/D converter circuit that is configured to execute the method according to claim 9 .