IP Library Granted Patent US 9,449,830
Granted Patent B2
US 9,449,830 · App. 14/326,205 · Granted Sep 20, 2016

Transistor having tungsten-based buried gate structure, method for fabricating the same

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Quick Facts
Patent No.
US 9,449,830
App. No.
14/326,205
Granted
Sep 20, 2016
Kind
B2
Abstract

A method for fabricating a transistor that includes forming a trench in a substrate, forming a gate dielectric layer on a surface of the trench, forming a first fluorine-free tungsten layer as an interface stabilization layer over the gate dielectric layer, forming a second fluorine-free tungsten layer as a barrier layer over the first fluorine-free tungsten layer, forming a bulk tungsten layer as a gate electrode over the second tungsten layer to fill the trench, and selectively recessing the third tungsten layer, the second tungsten layer and the first tungsten layer to form a buried gate structure.

Claims (36)

1. A method for fabricating a transistor, comprising:

forming a trench in a substrate;

forming a gate dielectric layer on a surface of the trench;

forming a first fluorine-free tungsten layer as an interface stabilization layer over the gate dielectric layer;

forming a second fluorine-free tungsten layer as a barrier layer over the first fluorine-free tungsten layer;

forming a third tungsten layer as a gate electrode over the second fluorine-free tungsten layer to fill the trench; and

selectively recessing the third tungsten layer, the second fluorine-free tungsten layer and the first fluorine-free tungsten layer to form a buried gate structure,

wherein the forming of the second fluorine-free tungsten layer is performed by applying a second high-frequency plasma power, and the forming of the first fluorine-free tungsten layer is performed by applying a first high-frequency plasma power, which is less than the second high-frequency plasma power.

2. The method of claim 1 , wherein the forming of the first fluorine-free tungsten layer and the forming of the second fluorine-free tungsten layer are performed in situ in an atomic layer deposition chamber.

3. The method of claim 1 , wherein the forming of the first fluorine-free tungsten layer and the forming of the second fluorine-free tungsten layer each include depositing a fluorine-free tungsten layer in a reaction between a fluorine-free tungsten compound and hydrogen plasma.

4. The method of claim 3 , wherein the forming of the first fluorine-free tungsten layer is performed by adding argon plasma to the hydrogen plasma.

5. The method of claim 1 , wherein the first fluorine-free tungsten layer and the second fluorine-free tungsten layer are formed through an atomic layer deposition process, and the third tungsten layer is formed through a chemical vapor deposition process.

6. The method of claim 1 , further comprising, before the forming of the trench:

forming an isolation region, which defines an active region in the substrate; and

recessing the isolation region below the trench to form a fin region.

7. A method for fabricating a transistor, comprising:

forming a trench in a substrate;

forming a gate dielectric layer on a surface of the trench;

performing a plasma nitridation process on the gate dielectric layer;

forming a first fluorine-free tungsten layer over the gate dielectric layer through a pre-treatment;

forming a second fluorine-free tungsten layer over the first fluorine-free tungsten layer;

performing a post-treatment of the first and second fluorine-free tungsten layers;

forming a third tungsten layer over the second fluorine-free tungsten layer to fill the trench;

annealing the third tungsten layer; and

selectively recessing the third tungsten layer, the second fluorine-free tungsten layer and the first fluorine-free tungsten layer to form a buried gate structure.

8. The method of claim 7 , wherein the forming of the first fluorine-free tungsten layer and the forming of the second fluorine-free tungsten layer are performed in situ in an atomic layer deposition chamber.

9. The method of claim 8 , wherein the pre-treatment is performed by applying plasma having a high-frequency plasma power less than the plasma of the post-treatment, and the forming of the second fluorine-free tungsten layer is performed by applying plasma having a high-frequency plasma power greater than the plasma of the post-treatment.

10. The method of claim 7 , wherein the forming of the second fluorine-free tungsten layer is performed by applying a second high-frequency plasma power, and the forming of the first fluorine-free tungsten layer is performed by applying a first high-frequency plasma power which is less than the second high-frequency plasma power.

11. The method of claim 7 , wherein the forming of the first fluorine-free tungsten layer and the forming of the second fluorine-free tungsten layer each include depositing a fluorine-free tungsten layer in a reaction between a fluorine-free tungsten compound and hydrogen plasma in an atomic deposition chamber.

12. The method of claim 11 , wherein the forming of the first fluorine-free tungsten layer is performed by adding argon plasma to the hydrogen plasma.

13. The method of claim 7 , wherein the first fluorine-free tungsten layer and the second fluorine-free tungsten layer are formed through an atomic layer deposition process, and the third tungsten layer is formed through a chemical vapor deposition process.

14. The method of claim 7 , wherein the pre-treatment is performed in a reaction between a fluorine-free tungsten compound and a combined plasma of hydrogen plasma and argon plasma.

15. The method of claim 7 , wherein the post-treatment includes a plasma treatment using a combined plasma of hydrogen plasma and nitride plasma.

16. The method of claim 7 , further comprising, before the forming of the trench:

forming an isolation region, which defines an active region in the substrate; and

recessing the isolation region below the trench to form a fin region.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067335/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 8, 2014
From: KANG, DONG-KYUN
To: SK HYNIX INC.
Reel/Frame 033264/0920 →