Semiconductor device and method for manufacturing semiconductor device including Al electrode formed on AlxGa(1-x)N layer
An electrode comes in ohmic contact with an AlGaN layer. A semiconductor device SD has a nitride semiconductor layer GN 2 , and an Al x Ga (1-x) N layer AGN (hereinafter referred to as “AlGaN layer AGN), and Al electrodes DE, SE. in the AlGaN layer AGN, 0<x≤0.2 is satisfied. Also, both of a concentration of a p-type impurity and a concentration of an n-type impurity in the AlGaN layer AGN are 1×10 16 cm −3 or lower. In this example, the p-type impurity is exemplified by, for example, Be, C, and Mg, and the n-type impurity is exemplified by Si, S, and Se. Also, the Al electrodes DE and SE are connected to the AlGaN layer AGN. Because a composition ratio of Al is limited to the above-mentioned range, the Al electrodes DE and SE are brought into ohmic contact with the AlGaN layer AGN.
1. A semiconductor device, comprising:
a nitride semiconductor layer comprising a GaN layer;
an Al x Ga (1-x) N layer (where 0<x≤0.2) that is formed on the GaN layer, in the Al x Ga (1-x) N layer, both of a concentration of a p-type impurity and a concentration of an n-type impurity are 1×10 16 cm −3 or lower;
an Al electrode that is formed on the Al x Ga (1-x) N layer;
a gate electrode formed above the Al x Ga (1-x) N layer, the gate electrode being electrically isolated from the Al x Ga (1-x) N layer;
a gate insulating film disposed on a bottom surface of the gate electrode; and
an insulating layer, separate from the gate insulating film, disposed on a bottom surface of the gate insulating film and on a surface of the Al x Ga (1-x) N layer,
wherein another bottom surface of the gate insulating film is located below an upper surface of the GaN layer, and
wherein a lowermost surface of the gate electrode is located above an upper surface of the insulating layer.
2. The semiconductor device according to claim 1 , wherein the p-type impurity is not contained in the Al x Ga (1-x) N layer.
3. The semiconductor device according to claim 1 , wherein the Al electrode comes in ohmic contact with the Al x Ga (1-x) N layer.
4. The semiconductor device according to claim 3 , wherein the GaN layer comprises a channel layer,
wherein the Al x Ga (1-x) N layer comprises an electron supply layer,
wherein the Al electrode comprises at least one of a source electrode and a drain electrode,
wherein the gate insulating film comes in contact with the Al x Ga (1-x) N layer, and comprises aluminum oxide, and
wherein the gate electrode comes in contact with the gate insulating film.
5. The semiconductor device according to claim 1 , wherein the Al electrode comprises at least one of Si, Ca, and Cu.
6. The semiconductor device according to claim 1 , wherein the gate insulating film is disposed below the gate electrode to electrically isolate the gate electrode from the Al x Ga (1-x) N layer.
7. The semiconductor device according to claim 6 , wherein the insulating layer is disposed on an upper surface of the Al x Ga (1-x) N layer.
8. The semiconductor device according to claim 7 , wherein, on the upper surface of the Al x Ga (1-x) N layer, the insulating layer separates the gate insulating film from the Al electrode.
9. The semiconductor device according to claim 7 , wherein, in a plan view, the insulating layer is located between the gate insulating film and the Al electrode.
10. The semiconductor device according to claim 6 , wherein outer edges of the gate insulating film are spaced apart from the Al electrode.
11. The semiconductor device according to claim 6 , wherein the gate insulating film penetrates into the GaN layer.
12. A semiconductor device, comprising:
a nitride semiconductor layer;
an Al x Ga (1-x) N layer (where 0<x≤0.2) formed on the nitride semiconductor layer;
an Al electrode formed on the Al x Ga (1-x) N layer;
a gate electrode formed on the Al x Ga (1-x) N layer, the gate electrode being electrically isolated from the Al x Ga (1-x) N layer;
a gate insulating film disposed on a bottom surface of the gate electrode; and
an insulating layer disposed on a bottom surface of the gate insulating film and on a surface of the Al x Ga (1-x) N layer, the insulating layer being separate from the gate insulating film,
wherein another bottom surface of the gate insulating film is located below an upper surface of the nitride semiconductor layer, and
wherein a lowermost surface of the gate electrode is located above an upper surface of the insulating layer.
13. The semiconductor device according to claim 12 , wherein, in the Al x Ga (1-x) N layer, a concentration of a p-type impurity and a concentration of an n-type impurity are 1×10 16 cm −3 or lower.
14. The semiconductor device according to claim 12 , wherein the insulating layer is disposed on an upper surface of the Al x Ga (1-x) N layer, and
wherein, on the upper surface of the Al x Ga (1-x) N layer, the insulating layer separates the gate insulating film from the Al electrode.
15. The semiconductor device according to claim 14 , wherein, in a plan view, the insulating layer is located between the gate insulating film and the Al electrode such that outer edges of the gate insulating film are spaced apart from the Al electrode.
16. The semiconductor device according to claim 14 , wherein the gate insulating film penetrates into the nitride semiconductor layer.