IP Library Granted Patent US 9,727,823
Granted Patent B2
US 9,727,823 · App. 14/339,289 · Granted Aug 8, 2017

Systems and methods for achieving orthogonal control of non-orthogonal qubit parameters

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Quick Facts
Patent No.
US 9,727,823
App. No.
14/339,289
Granted
Aug 8, 2017
Kind
B2
Abstract

Achieving orthogonal control of non-orthogonal qubit parameters of a logical qubit allows for increasing the length of a qubit chain thereby increasing the effective connectivity of the qubit chain. A hybrid qubit is formed by communicatively coupling a dedicated second qubit to a first qubit. By tuning a programmable parameter of the second qubit of a hybrid qubit, an effective programmable parameter of the hybrid qubit is adjusted without affecting another effective programmable parameter of the hybrid qubit thereby achieving orthogonal control of otherwise non-orthogonal qubit parameters. The length of the logical qubit may thus be increased by communicatively coupling a plurality of such hybrid qubits together.

Claims (40)

1. A method of controlling qubit parameters in a quantum processor, wherein the quantum processor includes a plurality of qubits, each qubit having a respective first programmable parameter and a respective second programmable parameter that at least partially depends on the respective first programmable parameter, and a plurality of coupling devices that each selectively provide communicative coupling between respective pairs of the qubits, the method comprising:

communicatively coupling at least three of the qubits to one another as a single logical qubit, the single logical qubit formed by a first outermost qubit, a second outermost qubit and at least one intermediary qubit, the at least one intermediary qubit communicatively coupled between the first and the second outermost qubits with sufficient coupling strength for the at least three qubits to act as a single qubit through an evolution of the quantum processor, the first outermost qubit being an outermost qubit of the qubits of the logical qubit in a first direction along a logical qubit communicative path defined by the qubits of the logical qubit and the second outermost qubit being an outermost qubit in a second direction along the logical qubit communicative path;

for at least one of the at least one intermediate qubits of the logical qubit, communicatively coupling a control qubit to the respective intermediate qubit such that the control qubit is not communicatively coupled to any other qubit except via the respective intermediate qubit;

programming the first and the second outermost qubits to have respective first programmable parameters less than or equal to a first value through the evolution of the quantum processor; and

programming the control qubit to have a value of the first programmable parameter higher than the first value through the evolution of the quantum processor.

2. The method of claim 1 wherein:

communicatively coupling at least three of the qubits to one another to act as a single logical qubit includes communicatively coupling at least two qubits as respective intermediate qubits communicatively coupled between the first and the second outermost qubits with sufficient coupling strength for the respective intermediate qubits and the first and the second outermost qubits to act as the single qubit through the evolution of the quantum processor; and

communicatively coupling a respective control qubit to each of the respective intermediate qubits.

3. The method of claim 1 wherein:

communicatively coupling at least three of the qubits to one another to act as a single logical qubit includes communicatively coupling at least two qubits as respective intermediate qubits communicatively coupled between the first and the second outermost qubits with sufficient coupling strength for the respective intermediate qubits and the first and the second outermost qubits to act as the single qubit through the evolution of the quantum processor;

for at least one of the at least one intermediate qubits of the logical qubit, communicatively coupling a control qubit to the respective intermediate qubit includes for each of the at least two intermediate qubits, communicatively coupling a respective qubit to the respective intermediate qubit; and

programming at least some of the intermediate qubits to have respective values of the first programmable parameter higher than the first value through the evolution of the quantum processor.

4. The method of claim 1 wherein:

communicatively coupling a control qubit to the respective intermediate qubit includes communicatively coupling the respective control qubit directly to the respective intermediate qubit.

5. The method of claim 1 wherein:

communicatively coupling a control qubit to the respective intermediate qubit includes communicatively coupling the respective control qubit directly via a respective one of the coupling devices to the respective intermediate qubit.

6. The method of claim 1 wherein a first area of the respective control qubit is less than a second area of the respective intermediate qubit.

7. The method of claim 1 wherein the first programmable parameter is tunneling amplitude, and programming the first programmable parameter of the first and the second outermost qubits includes programming a respective tunneling amplitude of the first and the second outermost qubits via the programming subsystem.

8. The method of claim 7 wherein the second programmable parameter is a persistent current of the second qubit, and wherein programming the tunneling amplitude of the qubit includes programming a respective tunneling amplitude of the qubit via the programming subsystem without affecting the persistent current of the first and the second outermost qubits.

9. A quantum processor apparatus, comprising:

a plurality of qubits, each qubit having a respective first programmable parameter and a respective second programmable parameter that at least partially depends on the respective first programmable parameter, and

a plurality of coupling devices that each selectively provide communicative coupling between respective pairs of the qubits, wherein:

at least three of the qubits are communicatively coupled to one another as a single logical qubit, the single logical qubit formed by a first outermost qubit, a second outermost qubit and at least one intermediary qubit, the at least one intermediary qubit communicatively coupled between the first and the second outermost qubits with sufficient coupling strength for the at least three qubits to act as a single qubit through an evolution of the quantum processor, the first outermost qubit being an outermost qubit of the qubits of the logical qubit in a first direction along a logical qubit communicative path defined by the qubits of the logical qubit and the second outermost qubit being an outermost qubit in a second direction along the logical qubit communicative path;

for at least one of the at least one intermediate qubits of the logical qubit, at least one of the qubits communicatively coupled as a control qubit to the respective intermediate qubit such that the control qubit is not communicatively coupled to any other qubit except via the respective intermediate qubit;

the first and the second outermost qubits each have a respective first programmable parameters less than or equal to a first value through the evolution of the quantum processor; and

the control qubit has a value of the first programmable parameter higher than the first value through the evolution of the quantum processor.

10. The quantum processor apparatus of claim 9 wherein:

the single logical qubit includes at least two qubits communicatively coupled between the first and the second outermost qubits as respective intermediate qubits, and a respective control qubit communicatively coupling to each of the respective intermediate qubits.

11. The quantum processor apparatus of claim 9 wherein:

the single logical qubit includes at least two qubits communicatively coupled between the first and the second outermost qubits as respective intermediate qubits, and

for each of the intermediate qubits, a respective control qubit communicatively coupled to the respective intermediate qubit; and

at least some of the intermediate qubits having respective values of the first programmable parameter higher than the first value.

12. The quantum processor apparatus of claim 9 wherein the respective control qubit is communicatively coupled directly to the respective intermediate qubit.

13. The quantum processor apparatus of claim 9 wherein the respective control qubit is coupled directly via a respective one of the coupling devices to the respective intermediate qubit.

14. The quantum processor apparatus of claim 9 wherein a first area of the control qubit is less than a second area of the respective intermediate qubit.

15. The quantum processor apparatus of claim 9 wherein the first programmable parameter is tunneling amplitude, and a respective tunneling amplitude of the first and the second outermost qubits is less than or equal to the first value.

16. The quantum processor apparatus of claim 15 wherein the second programmable parameter is a persistent current of the second qubit, and a respective tunneling amplitude of the control qubit does not affect the persistent current of the first and the second outermost qubits.

17. The quantum processor apparatus of claim 9 , further comprising:

at least one first programming subsystem communicatively coupled to a compound Josephson junction of at least one of the qubits and operable to program a tunneling amplitude of the at least one of the qubits; and

at least one second programming subsystem communicatively coupled to a qubit loop of at least one of the qubits and operable to program a persistent current of the at least one of the qubits.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2025
From: PSPIB UNITAS INVESTMENTS II INC.
To: D-WAVE SYSTEMS INC.; 1372934 B.C. LTD.
Reel/Frame 070470/0098 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Apr 14, 2023
From: D-WAVE SYSTEMS INC.; 1372934 B.C. LTD.
To: PSPIB UNITAS INVESTMENTS II INC., AS COLLATERAL AGENT
Reel/Frame 063340/0888 →
RELEASE OF SECURITY INTEREST Recorded Sep 20, 2022
From: PSPIB UNITAS INVESTMENTS II INC., IN ITS CAPACITY AS COLLATERAL AGENT
To: D-WAVE SYSTEMS INC.
Reel/Frame 061493/0694 →
SECURITY INTEREST Recorded Mar 3, 2022
From: D-WAVE SYSTEMS INC.
To: PSPIB UNITAS INVESTMENTS II INC.
Reel/Frame 059317/0871 →
SECURITY INTEREST Recorded Nov 29, 2019
From: D-WAVE SYSTEMS INC.
To: BDC CAPITAL INC.
Reel/Frame 051144/0499 →
SECURITY INTEREST Recorded Mar 22, 2019
From: D-WAVE SYSTEMS INC.
To: BDC CAPITAL INC.
Reel/Frame 048674/0188 →