IP Library Granted Patent US 9,502,175
Granted Patent B2
US 9,502,175 · App. 14/339,414 · Granted Nov 22, 2016

Circuit device

Inventors: Masaya Kawano (Kanagawa, JP); Yasutaka Nakashiba (Kanagawa, JP)
Assignee: Renesas Electronics Corporation
H01F38/14H01F17/0013H01F2017/0086H01F2038/143H01L2224/4813H01L2224/48137H01L2924/00014H01L2924/30107
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Quick Facts
Patent No.
US 9,502,175
App. No.
14/339,414
Granted
Nov 22, 2016
Kind
B2
Abstract

A circuit device includes a semiconductor substrate, a first inductor provided over the semiconductor substrate, and a second inductor provided over the semiconductor substrate and coupled to the first inductor. The first inductor and second inductor are wound in a same direction with each other from respective inner end portions to respective outer end portions thereof.

Claims (18)

1. A circuit device, comprising:

a semiconductor substrate;

a first inductor provided over said semiconductor substrate;

a second inductor provided over said semiconductor substrate and coupled to said first inductor;

a third inductor provided over said semiconductor substrate and located in a region overlapping with said first inductor when viewed from a direction perpendicular to said semiconductor substrate, said third inductor being positioned at a region between said semiconductor substrate and said first inductor; and

a fourth inductor provided over said semiconductor substrate and overlapping with said second inductor when viewed from a direction perpendicular to said semiconductor substrate, said fourth inductor being positioned at a region between said semiconductor substrate and said second inductor,

wherein said first inductor comprises a first inner end portion and a first outer end portion,

wherein said second inductor comprises a second inner end portion and a second outer end portion,

wherein said third inductor comprises a third inner end portion,

wherein said fourth inductor comprises a fourth inner end portion,

wherein said first inductor is wound in a first direction from said first inner end portion to said first outer end portion,

wherein said second inductor is wound in the first direction from said second inner end portion to said second outer end portion,

wherein said first outer end portion and said second outer end portion are coupled to each other, and

wherein said third inner end portion and said fourth inner end portion are not coupled to each other.

2. The circuit device according to claim 1 , wherein said first inner end portion and said second inner end portion are coupled to each other.

3. The circuit device according to claim 1 , further comprising:

a first interconnect provided over said semiconductor substrate and coupled to said third inductor; and

a second interconnect provided over said semiconductor substrate and coupled to said fourth inductor.

Assignments (1)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
Priority Claims (1)
JP 2008-174111 · Jul 3, 2008 · national
Continuity (3)
Division 13306302 · Nov 29, 2011
Continuation 12457295 · Jun 5, 2009
Related Publication 20140333149A1 · Nov 13, 2014