IP Library Granted Patent US 9,818,337
Granted Patent B2
US 9,818,337 · App. 14/340,410 · Granted Nov 14, 2017

LED display control circuit with PWM circuit for driving a plurality of LED channels

Inventors: Eric Li (Milpitas, CA); Shang-Kuan Tang (Fremont, CA); Wenjie Yang (GuangDong, CN); Yutao Chen (GuangDong, CN); Tianqi Qiu (Milpitas, CA); Jun Tian (Milpitas, CA); Hui Li (Milpitas, CA)
Assignee: SCT TECHNOLOGY, LTD.
G09G3/32G09G3/2014
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Quick Facts
Patent No.
US 9,818,337
App. No.
14/340,410
Granted
Nov 14, 2017
Kind
B2
Abstract

The current disclosure provides an LED display control circuit. The control circuit has a device configured to separate a first PWM data into LSB data and MSB data. The control circuit also comprises a LSB circuit coupled to a plurality of LED channels. The LSB circuit is configured to supply LSB data to each of the plurality of LED channels.

Claims (9)

1. An LED display control circuit, comprising:

a device configured to separate a first PWM data into an LSB data and a MSB data;

an LSB circuit coupled to a plurality of LED channels, wherein the LSB circuit comprises a LSB SRAM that stores the LSB data;

a ROM coupled to the LSB SRAM, wherein the ROM stores a look up table;

a LSB multiplexer coupled to the ROM for multiplexing the LSB data into each of the plurality of LED channels,

a MSB multiplexer for multiplexing the MSB data to each of the plurality of LED channels,

wherein each of the plurality of LED channels comprises a MSB SRAM for storing the MSB data received from the MSB multiplexer, a shift register for storing the LSB data received from the LSB multiplexer, and a latch coupled to the shift register, wherein the latch is configured to block or release the LSB data received from the LSB multiplexer.

2. The LED display control circuit of claim 1 , wherein the LSB data stored in the shift register in each of the plurality of LED channels is released from the latch sequentially and the released LSB data combines the MSB data in the MSB SRAM to generate a second PWM data.

3. The LED display control circuit of claim 1 , further comprising a pipeline register located between the SRAM and the ROM.

Assignments (3)
LICENSE Recorded Sep 17, 2023
From: SILICONCORE TECHNOLOGY, INC.
To: SEOUL SEMICONDUCTOR CO., LTD.
Reel/Frame 064929/0302 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2018
From: SCT TECHNOLOGY, LTD.
To: SCT LTD.
Reel/Frame 046422/0356 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2014
From: LI, ERIC; TANG, SHANG-KUAN; YANG, WENJIE; CHEN, YUTAO; QIU, TIANQI; TIAN, JUN; LI, HUI
To: SCT TECHNOLOGY, LTD.
Reel/Frame 033388/0457 →
Continuity (1)
Related Publication 20160027385A1 · Jan 28, 2016