IP Library Granted Patent US 9,311,998
Granted Patent B2
US 9,311,998 · App. 14/342,431 · Granted Apr 12, 2016

Apparatus to store data and methods to read memory cells

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Quick Facts
Patent No.
US 9,311,998
App. No.
14/342,431
Granted
Apr 12, 2016
Kind
B2
Abstract

Apparatus to store data and methods to read memory cells are disclosed. A disclosed example method involves, during a read cycle of a memory cell, applying a current across the memory cell to read a content of the memory cell. During a subsequent read cycle of the memory cell, a subsequent current is applied across the memory cell in the opposite direction to read the content of the memory cell.

Claims (12)

1. A method to read a memory cell, comprising:

during a read cycle of the memory cell, applying a current across the memory cell to read a content of the memory cell; and

during a subsequent read cycle of the memory cell, applying a subsequent current across the memory cell in a direction opposite the current to read the content of the memory cell.

2. The method of claim 1 , wherein:

applying the current changes a first distribution of a dopant in the memory cell to a second distribution of the dopant, the first and second distributions of the dopant representing a same stored information; and

applying the subsequent current is to render the first distribution of the dopant.

3. The method of claim 2 , wherein the first and second distributions of the dopant are to be above a threshold to represent the same stored information.

4. The method of claim 2 , further comprising, during a write cycle occurring before the read cycle, applying a third current across the memory cell to render the first distribution of the dopant in the memory cell.

5. The method of claim 1 , wherein the memory cell is a memristive memory cell.

6. The method of claim 1 , wherein the current and the subsequent current are direct currents.

7. The method of claim 1 , further comprising performing at least one intervening read cycle of the memory cell between the read cycle and the subsequent read cycle.

8. The method of claim 1 , further comprising, prior to receiving a request for the subsequent read cycle, changing an electrical current configuration to apply the subsequent current across the memory cell in the direction opposite the current.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 5, 2022
From: OT PATENT ESCROW, LLC
To: VALTRUS INNOVATIONS LIMITED
Reel/Frame 061244/0298 →
PATENT ASSIGNMENT, SECURITY INTEREST, AND LIEN AGREEMENT Recorded Jan 26, 2021
From: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP; HEWLETT PACKARD ENTERPRISE COMPANY
To: OT PATENT ESCROW, LLC
Reel/Frame 055269/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2014
From: TAVALLAEI, SIAMAK
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 032335/0396 →