IP Library Granted Patent US 9,195,490
Granted Patent B2
US 9,195,490 · App. 14/347,894 · Granted Nov 24, 2015

Differential voltage and frequency scaling (DVFS) switch reduction

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Quick Facts
Patent No.
US 9,195,490
App. No.
14/347,894
Granted
Nov 24, 2015
Kind
B2
Abstract

Technologies are generally described for systems, devices and methods effective to schedule access to a core. In some examples, a first differential voltage frequency scaling (DVFS) value of a first virtual machine may be received by a virtual machine manager. A second DVFS value of a second virtual machine may be received by the virtual machine manager. A third DVFS value of a third virtual machine may be received by the virtual machine manager. The third DVFS value may be substantially the same as the first DVFS value and different from the second DVFS value. A dispatch cycle may be generated to execute the first, second and third virtual machines on the core. After execution of the first virtual machine, the dispatch cycle may require execution of the third virtual machine before execution of the second virtual machine.

Claims (57)

1. A method to schedule access to a core, the method comprising:

receiving, by a virtual machine manager, a first differential voltage frequency scaling (DVFS) value of a first virtual machine;

receiving, by the virtual machine manager, a second DVFS value of a second virtual machine;

receiving, by the virtual machine manager, a third DVFS value of a third virtual machine, wherein the third DVFS value is substantially the same as the first DVFS value and different from the second DVFS value, and wherein the first, second, and third virtual machines are different virtual machines; and

generating a dispatch cycle to execute the first, second, and third virtual machines on the core, wherein after execution of the first virtual machine, the dispatch cycle requires execution of the third virtual machine before execution of the second virtual machine.

2. The method of claim 1 , further comprising, prior to generation of the dispatch cycle:

quantizing the first, second, and third DVFS values into a finite set of discrete DVFS states.

3. The method of claim 1 , wherein generating the dispatch cycle comprises adjustment of sizes of blocks of core time for each of the first, second, and third virtual machines based on at least one of respective processing needs and/or service level guarantees for the first, second, and third virtual machines.

4. The method of claim 1 , further comprising:

modifying the dispatch cycle to generate a modified dispatch cycle, wherein the modified dispatch cycle causes the core to:

execute the virtual machine manager at the first DVFS value;

execute the third virtual machine;

execute the virtual machine manager at the third DVFS value;

execute the virtual machine manager at the second DVFS value; and

execute the second virtual machine.

5. The method of claim 4 , wherein generating the modified dispatch cycle comprises adjustment of sizes of blocks of core time for each of the first, second, and third virtual machines based on at least one of respective processing needs and/or service level guarantees for the first, second, and third virtual machines.

6. The method of claim 5 , wherein generating the modified dispatch cycle further comprises adjustment of sizes of blocks of core time for the virtual machine manager.

7. The method of claim 1 , further comprising:

determining that at least one of the first, second, or third DVFS values has changed to a new DVFS value; and

generating a new dispatch cycle based on the new DVFS value.

8. A method to schedule access to a core, the method comprising:

receiving, by a virtual machine manager, a first differential voltage frequency scaling (DVFS) value of a first virtual machine;

receiving, by the virtual machine manager, a second DVFS value of a second virtual machine, wherein the first and second virtual machines are different virtual machines, and wherein the first DVFS value is different from the second DVFS value;

generating a first dispatch cycle to execute the first and second virtual machines on the core; and

modifying the first dispatch cycle to produce a second dispatch cycle, wherein the second dispatch cycle causes the core to:

execute the virtual machine manager at the first DVFS value prior to execution of the first virtual machine;

execute the first virtual machine;

execute the virtual machine manager at the first DVFS value;

execute the virtual machine manager at the second DVFS value; and

execute the second virtual machine.

9. The method of claim 8 , further comprising, prior to generation of the first dispatch cycle:

quantizing the first and second DVFS values into a finite set of discrete DVFS states.

10. The method of claim 8 , further comprising:

determining that at least one of the first or second DVFS values has changed to a new DVFS value; and

generating a third dispatch cycle based on the new DVFS value.

11. The method of claim 8 , wherein generating the first dispatch cycle comprises adjustment of sizes of blocks of core time for each of the first and second virtual machines based on at least one of respective processing needs and/or service level guarantees for the first and second virtual machines.

12. The method of claim 11 , wherein generating the second dispatch cycle comprises adjustment of sizes of blocks of core time for each of the first and second virtual machines based on at least one of respective processing needs and/or service level guarantees for the first and second virtual machines.

13. The method of claim 12 , wherein generating the second dispatch cycle further comprises adjustments of sizes of blocks of core time for the virtual machine manager.

14. A system effective to schedule access to a core, the system comprising:

a memory that stores instructions; and

a processor configured to be in communication with the memory, the processor effective to, in accordance with the instructions:

receive, by a virtual machine manager, a first differential voltage frequency scaling (DVFS) value of a first virtual machine;

receive, by the virtual machine manager, a second DVFS value of a second virtual machine;

receive, by the virtual machine manager, a third DVFS value of a third virtual machine, wherein the third DVFS value is substantially the same as the first DVFS value and different from the second DVFS value, and wherein the first, second, and third virtual machines are different virtual machines; and

generate a dispatch cycle to execute the first, second, and third virtual machines on the core, wherein after execution of the first virtual machine, the dispatch cycle requires execution of the third virtual machine before execution of the second virtual machine, and wherein the dispatch cycle causes the core to:

execute the virtual machine manager at the first DVFS value;

execute the third virtual machine;

execute the virtual machine manager at the third DVFS value;

execute the virtual machine manager at the second DVFS value; and

execute the second virtual machine.

15. The system of claim 14 , wherein the processor is further effective to, prior to generation of the dispatch cycle:

quantize the first, second, and third DVFS values into a finite set of discrete DVFS states.

16. The system of claim 14 , wherein the processor is further effective to:

determine that at least one of the first, second, or third DVFS values has changed to a new DVFS value; and

generate a new dispatch cycle based on the new DVFS value.

17. The system of claim 14 , wherein generating the dispatch cycle comprises adjustment of sizes of blocks of core time for each of the first, second, and third virtual machines based on at least one of respective processing needs and/or service level guarantees of the first, second, and third virtual machines.

18. The system of claim 17 , wherein generating the dispatch cycle further comprises adjustment of sizes of blocks of core time for the virtual machine manager.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS, RECORDED ON JANUARY 29, 2019 AT REEL 048373 FRAME 0217 Recorded Sep 22, 2025
From: CRESTLINE DIRECT FINANCE, L.P., AS COLLATERAL AGENT
To: EMPIRE TECHNOLOGY DEVELOPMENT LLC
Reel/Frame 072936/0464 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2021
From: EMPIRE TECHNOLOGY DEVELOPMENT LLC
To: INVINCIBLE IP LLC
Reel/Frame 055594/0500 →
RELEASE OF SECURITY INTEREST Recorded Oct 21, 2020
From: CRESTLINE DIRECT FINANCE, L.P.
To: EMPIRE TECHNOLOGY DEVELOPMENT LLC
Reel/Frame 054129/0627 →
SECURITY INTEREST Recorded Jan 29, 2019
From: EMPIRE TECHNOLOGY DEVELOPMENT LLC
To: CRESTLINE DIRECT FINANCE, L.P.
Reel/Frame 048373/0217 →