IP Library Granted Patent US 9,397,206
Granted Patent B2
US 9,397,206 · App. 14/356,984 · Granted Jul 19, 2016

Semiconductor device and method for manufacturing the same

Inventor: Satoru Kameyama (Toyota, JP)
Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
H01L29/7395H01L21/268H01L21/26513H01L27/0664H01L29/0834H01L29/36H01L29/6609H01L29/66333H01L29/66348H01L29/7397H01L29/861
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Quick Facts
Patent No.
US 9,397,206
App. No.
14/356,984
Granted
Jul 19, 2016
Kind
B2
Abstract

A semiconductor device including a semiconductor substrate in which a diode region and an IGBT region are formed is provided. In the semiconductor device, the diode region includes a second conductivity type cathode layer. An impurity concentration of second conductivity type impurities of the cathode layer is distributed in a curve pattern having at least two peaks, and the impurity concentration of the second conductivity type impurities is higher than that of first conductivity type impurities at all depths of the cathode layer.

Claims (40)

1. A semiconductor device comprising a semiconductor substrate in which a diode region and an IGBT region are formed, wherein

the diode region comprises:

a first conductivity type anode layer exposed at an upper surface of the semiconductor substrate;

a second conductivity type diode drift layer formed on a lower surface side of the anode layer; and

a second conductivity type cathode layer formed on a lower surface side of the diode drift layer,

the IGBT region comprises:

a second conductivity type emitter layer exposed at the upper surface of the semiconductor substrate;

a first conductivity type IGBT body layer formed on a lower surface side of the emitter layer;

a second conductivity type IGBT drift layer formed on a lower surface side of the IGBT body layer;

a first conductivity type collector layer formed on a lower surface side of the IGBT drift layer; and

an IGBT gate electrode facing a range of the IGBT body layer via an insulating film, wherein the range of the IGBT body layer separates the emitter layer from the IGBT drift layer,

an impurity concentration of second conductivity type impurities of the cathode layer is distributed in a curve pattern having at least two peaks in a thickness direction of the semiconductor device,

an impurity concentration of first conductivity type impurities of the cathode layer is distributed in a curved pattern having at least one peak in the thickness direction of the semiconductor device, and

the impurity concentration of the second conductivity type impurities is higher than that of first conductivity type impurities at all depths of the cathode layer.

2. A method for manufacturing the semiconductor device according to claim 1 from a semiconductor wafer, the method comprising:

forming the cathode layer of the semiconductor device,

wherein the forming includes:

doping first conductivity type impurity ions to a lower surface of the semiconductor wafer;

doping second conductivity type impurity ions to the lower surface of the semiconductor wafer at least two times to different depths; and

annealing the semiconductor wafer that has been doped with the first conductivity type impurity ions and the second conductivity type impurity ions.

3. A semiconductor device comprising a semiconductor substrate in which a diode region and an IGBT region are formed, wherein

the diode region comprises:

a first conductivity type anode layer exposed at an upper surface of the semiconductor substrate;

a second conductivity type diode drift layer formed on a lower surface side of the anode layer; and

a second conductivity type cathode layer formed on a lower surface side of the diode drift layer,

the IGBT region comprises:

a second conductivity type emitter layer exposed at the upper surface of the semiconductor substrate;

a first conductivity type IGBT body layer formed on a lower surface side of the emitter layer;

a second conductivity type IGBT drift layer formed on a lower surface side of the IGBT body layer;

a first conductivity type collector layer formed on a lower surface side of the IGBT drift layer; and

an IGBT gate electrode facing a range of the IGBT body layer via an insulating film, wherein the range of the IGBT body layer separates the emitter layer from the IGBT drift layer,

an impurity concentration of first conductivity type impurities of the collector layer is distributed in a curve pattern having at least two peaks in a thickness direction of the semiconductor device,

an impurity concentration of second conductivity type impurities of the collector layer is distributed in a curved pattern having at least one peak in the thickness direction of the semiconductor device, and

the impurity concentration of the first conductivity type impurities is higher than that of second conductivity type impurities at all depths of the collector layer.

4. A method for manufacturing the semiconductor device according to claim 3 from a semiconductor wafer, the method comprising:

forming the collector layer of the semiconductor device,

wherein the forming includes:

doping second conductivity type impurity ions to a lower surface of the semiconductor wafer;

doping first conductivity type impurity ions to the lower surface of the semiconductor wafer at least two times to different depths; and

annealing the semiconductor wafer that has been doped with the first conductivity type impurity ions and the second conductivity type impurity ions.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: TOYOTA JIDOSHA KABUSHIKI KAISHA
To: DENSO CORPORATION
Reel/Frame 052281/0019 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2014
From: KAMEYAMA, SATORU
To: TOYOTA JIDOSHA KABUSHIKI KAISHA
Reel/Frame 032849/0769 →
Continuity (1)
Related Publication 20140306267A1 · Oct 16, 2014