IP Library Granted Patent US 9,111,574
Granted Patent B2
US 9,111,574 · App. 14/359,251 · Granted Aug 18, 2015

Data storage device and method for generating a reference clock signal for data storage device

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Quick Facts
Patent No.
US 9,111,574
App. No.
14/359,251
Granted
Aug 18, 2015
Kind
B2
Abstract

Various embodiments provide a data storage device. The data storage device includes a recording medium having a dedicated servo layer for providing servo information. The dedicated servo layer may include a plurality of servo patterns, wherein each servo pattern includes a preamble providing information for synchronization of at least one of a read and a write operation of the data storage device.

Claims (34)

1. A data storage device, comprising:

a recording medium having a dedicated servo layer for providing servo information,

wherein the dedicated servo layer comprises a plurality of servo patterns, each servo pattern comprising (i) a preamble providing information for synchronization of at least one of a read operation and a write operation of the data storage device, and (ii) subsequent to the preamble, a servo burst including the servo information, and

wherein each preamble comprises a sequence of pulses repeated at a predetermined frequency; and

a timing recovery circuit configured to (i) receive a signal based on the sequence of pulses repeated at the predetermined frequency in the preamble, (ii) detect a phase of the signal, and (ii) generate, based on the detected phase, a reference signal for the synchronization of the at least one of the read operation and the write operation.

2. The data storage of claim 1 , wherein a length of the servo burst is dependent on coasting capability of a phase lock loop circuit of the timing recovery circuit.

3. The data storage device of claim 1 , wherein each servo pattern further comprises a plurality of the preambles arranged next to the servo burst.

4. The data storage device of claim 3 , wherein the preambles are synchronized with each other.

5. The data storage device of claim 1 , wherein each servo pattern comprises a plurality of alternately arranged preambles and servo bursts.

6. The data storage device of claim 5 , wherein each servo pattern further comprises a plurality of further preambles arranged after the plurality of alternately arranged preambles and servo bursts.

7. The data storage device of claim 6 , wherein the preambles and the further preambles are synchronized with each other.

8. The data storage device of claim 1 , wherein the dedicated servo layer comprises a plurality of sectors, each sector comprising one of the plurality of servo patterns.

9. The data storage device of claim 8 , wherein each sector of the dedicated servo layer comprises a blank portion.

10. The data storage device of claim 9 , wherein the recording medium further comprises a data layer configured to record data therein.

11. The data storage device of claim 10 , wherein the data layer comprises a plurality of sectors, each sector comprising a user data portion and a parameter portion,

the user data portion being located corresponding to the servo pattern of the dedicated servo layer, and the parameter portion being located corresponding to the blank portion of the dedicated servo layer.

12. A method for generating a reference clock signal for synchronization of at least one of a read operation and a write operation of a data storage device, the method comprising:

generating the reference clock signal based on a plurality of servo patterns stored in a dedicated servo layer of the data storage device,

wherein each servo pattern comprises (i) a preamble providing information for synchronization of at least one of the read operation and the write operation of the data storage device, and (ii) subsequent to the preamble, a servo burst including servo information,

wherein each preamble comprises a sequence of pulses repeated at a predetermined frequency, and

wherein generating the reference clock signal includes, using a timing recovery circuit,

receiving a signal based on the sequence of pulses repeated at the predetermined frequency in the preamble,

detecting a phase of the signal, and

generating, based on the detected phase, the reference clock signal for the synchronization of the at least one of the read operation and the write operation.

13. The method of claim 12 , further comprising:

initializing a phase lock loop circuit upon reading of the preamble in the dedicated servo layer to generate the reference clock signal synchronous with the preamble.

14. The method of claim 13 , further comprising:

coasting the phase lock loop circuit upon reading of the servo burst in the dedicated servo layer maintain both a frequency and a phase of the generated reference clock signal.

15. The method of claim 14 , further comprising:

initializing a digital phase lock loop circuit during the coasting of the phase lock loop circuit.

16. The method of claim 13 , further comprising:

initializing the phase lock loop circuit using one or more of an automatic gain control, a sector address mark, and a GrayCode stored in a data layer of the data storage device.

17. The method of claim 14 , further comprising:

repeating the initializing and the coasting of the phase lock loop circuit during the reading of a servo pattern having a plurality of alternately arranged preambles and servo bursts.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053475/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2020
From: MARVELL INTERNATIONAL LTD.
To: CAVIUM INTERNATIONAL
Reel/Frame 052918/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2015
From: THE AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
To: MARVELL INTERNATIONAL LTD.
Reel/Frame 034856/0776 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2014
From: ZHANG, JINGLIANG; LIN, LIN THI @ HTWE HTWE YEE
To: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
Reel/Frame 033583/0662 →