IP Library Granted Patent US 9,082,842
Granted Patent B2
US 9,082,842 · App. 14/359,761 · Granted Jul 14, 2015

Semiconductor device

Inventors: Yasuhiro Hirabayashi (Toyota, JP); Masaru Senoo (Okazaki, JP)
Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
H01L29/78H01L29/0696H01L29/407H01L29/4236H01L29/4238H01L29/7397H01L29/7811H01L29/7813H01L29/0615H01L29/0619
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Quick Facts
Patent No.
US 9,082,842
App. No.
14/359,761
Granted
Jul 14, 2015
Kind
B2
Abstract

A semiconductor device disclosed herein includes an insulated gate, a main and a sub trench conductors. The main and sub trench conductors are formed in the cell region, and have a conductor that is covered with an insulation film and fills a trench extending in a first direction. The sub trench is located, with respect to the main trench conductor, in a second direction perpendicularly crossing the first direction and extending from the cell region side to the non-cell region. Length of the sub trench conductor in the first direction is shorter than a length of the insulated gate in the first direction. Distance between the main and sub trench conductors is shorter than a distance between the main trench conductor and the insulated gate. At least a part of the sub trench conductor reaches a position deeper than a boundary between the first and second semiconductor regions.

Claims (24)

1. A semiconductor device comprising a semiconductor substrate including a cell region and a non-cell region arranged around the cell region, wherein:

the cell region comprises:

a first semiconductor region of a first conductivity type;

a second semiconductor region of a second conductivity type formed on a surface of the semiconductor substrate on a front surface side of the first semiconductor region;

an insulated gate of a trench type extending from a surface side of the semiconductor substrate through the second semiconductor region to a depth where the insulated gate is in contact with the first semiconductor region, a lengthwise direction of the insulated gate being extended in a first direction; and

a first trench conductor formed at least partially in the cell region between the insulated gate and the non-cell region, and having a conductor that is covered with an insulation film and fills a trench,

the first trench conductor includes a first portion extending in the first direction, and a second portion protruding in a second direction perpendicularly crossing the first direction and extending from a cell region side toward the non-cell region, and

at least a part of a bottom of the second portion reaches a position deeper than a boundary between the first and second semiconductor regions;

wherein the semiconductor device, further comprising:

a second trench conductor formed at least partially in the cell region between the first portion of the first trench conductor and the non-cell region, and having a conductor that is covered with the insulation film and fills a trench, wherein:

the second trench conductor is positioned in the second direction with respect to the first portion of the first trench conductor,

a length of the second trench conductor in the first direction is shorter than a length of the insulated gate in the first direction,

a distance between the first portion of the first trench conductor and the second trench conductor is shorter than a distance between the first trench conductor and the insulated gate nearest to the first trench conductor, and

at least a part of the second trench conductor reaches a position deeper than the boundary between the first and second semiconductor regions.

2. A semiconductor device comprising a semiconductor substrate including a cell region and a non-cell region arranged around the cell region, wherein:

the cell region comprises:

a first semiconductor region of a first conductivity type;

a second semiconductor region of a second conductivity type formed on a surface of the semiconductor substrate on a front surface side of the first semiconductor region;

an insulated gate of a trench type extending from a surface side of the semiconductor substrate through the second semiconductor region to a depth where the insulated gate is in contact with the first semiconductor region, a lengthwise direction of the insulated gate being extended in a first direction;

a third trench conductor formed in the cell region between the insulated gate and the non-cell region, and having a conductor that is covered with an insulation film and fills a trench extending in the first direction; and

a fourth trench conductor formed at least partially in the cell region between the insulated gate and the non-cell region, and having a conductor that is covered with the insulation film and fills a trench located, with respect to the third trench conductor, in a second direction perpendicularly crossing the first direction and extending from a cell region side toward the non-cell region,

a length of the fourth trench conductor in the first direction is shorter than a length of the insulated gate in the first direction,

a distance between the third and fourth trench conductors is shorter than a distance between the third trench conductor and the insulated gate nearest to the third trench conductor, and

at least a part of the fourth trench conductor reaches a position deeper than a boundary between the first and second semiconductor regions.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: TOYOTA JIDOSHA KABUSHIKI KAISHA
To: DENSO CORPORATION
Reel/Frame 052281/0019 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 21, 2014
From: HIRABAYASHI, YASUHIRO; SENOO, MASARU
To: TOYOTA JIDOSHA KABUSHIKI KAISHA
Reel/Frame 032941/0586 →
Continuity (1)
Related Publication 20140291757A1 · Oct 2, 2014