Demodulation device, demodulation method and program
View Patent ↗The present technique relates to a demodulation device, a demodulation method and a program capable of realizing a demodulation process at a rate equivalent to a case where I and Q channel signals are not inverted, even when the I and Q channel signals are inverted. A frequency correction unit establishes synchronization of a frequency and clock based on a signal from a frequency synchronization unit. A channel inversion detection unit of a frame synchronization unit detects presence or absence of inversion of I and Q channel signals, and supplies, as a detection result, a channel inversion detection result to the channel inversion control unit. The channel inversion control unit switches the I and Q channel signals if the inversion has occurred, based on the channel inversion detection result. This technique can be applied to a demodulation device.
1. A demodulation device that demodulates an input signal split into two signals of an I channel and a Q channel, the demodulation device comprising:
circuitry configured to
correct a frequency of the input signal to produce a frequency-corrected input signal, synchronize the frequency-corrected input signal with a predetermined clock signal to perform clock synchronization between the I channel and the Q channel to produce a frequency-corrected and clock-synchronized input signal, and synchronize the frequency of the frequency-corrected and clock-synchronized input signal by obtaining a correction amount required to synchronize the frequency of the input signal with a predetermined frequency to perform frequency synchronization between the I channel and the Q channel to produce a frequency-corrected, clock-synchronized, and frequency-synchronized input signal;
detect whether the I channel and the Q channel of the frequency-corrected, clock-synchronized, and frequency-synchronized input signal are inverted; and
switch, if it is detected that the I channel and the Q channel are inverted, the I channel and the Q channel of the frequency-corrected, clock-synchronized, and frequency-synchronized input signal.
2. The demodulation device according to claim 1 ,
wherein the circuitry is configured to switch the I channel and the Q channel of the input signal at a timing from which a frame of the input signal changes.
3. The demodulation device according to claim 1 ,
wherein the circuitry is configured to again switch the I channel and the Q channel of the input signal, if frame synchronization to the input signal is not established within a predetermined time period after switching the I channel and the Q channel of the input signal.
4. A demodulation method of a demodulation device that demodulates an input signal split into two signals of an I channel and a Q channel, the demodulation method comprising the steps of:
executing, in circuitry, a frequency correction process that corrects frequency of the input signal to produce a frequency-corrected input signal, synchronizing the frequency-corrected input signal with a predetermined clock signal to perform clock synchronization between the I channel and the Q channel to produce a frequency-corrected and clock-synchronized input signal, and synchronizing the frequency of the frequency-corrected and clock-synchronized input signal by obtaining a correction amount required to synchronize the frequency of the input signal with a predetermined frequency to perform frequency synchronization between the I channel and the Q channel to produce a frequency-corrected, clock-synchronized, and frequency-synchronized input signal;
executing, in the circuitry, an inversion detection process that detects the I channel and the Q channel of the frequency-corrected, clock-synchronized, and frequency-synchronized input signal are inverted; and
executing, in the circuitry, a channel control process that switches, if it is detected that the I channel and the Q channel are inverted in the inversion detection process, the I channel and the Q channel of the frequency-corrected, clock-synchronized, and frequency-synchronized input signal.
5. A non-transitory, computer-readable storage medium storing computer-executable instructions that, when executed by a computer controlling a demodulation device that demodulates an input signal split into two signals of an I channel and a Q channel, cause the computer to perform a method comprising:
correcting a frequency of the input signal to produce a frequency-corrected input signal, synchronizing the frequency-corrected input signal with a predetermined clock signal to perform clock synchronization between the I channel and the Q channel to produce a frequency-corrected and clock-synchronized input signal, and synchronizing the frequency of the frequency-corrected and clock-synchronized input signal by obtaining a correction amount required to synchronize the frequency of the input signal with a predetermined frequency to perform frequency synchronization between the I channel and the Q channel to produce a frequency-corrected, clock-synchronized, and frequency-synchronized input signal;
detecting whether the I channel and the Q channel of the frequency-corrected, clock-synchronized, and frequency-synchronized input signal are inverted; and
switching, if it is detected that the I channel and the Q channel are inverted, the I channel and the Q channel of the frequency-corrected, clock-synchronized, and frequency-synchronized input signal.
6. The demodulation device according to claim 1 , wherein
the circuitry is configured to correct the frequency, synchronize the frequency-corrected input signal with the predetermined clock signal, and synchronize the frequency in a loop.