Power converter with digital current control circuit

1. A current control circuit for a power converter to control the switching thereof, the current control circuit comprising:

a digital controller using a logical error signal to produce a logical control signal with a fixed fundamental frequency for the power converter; and

a current measurement device for measuring a current in the power converter,

wherein the current control circuit is configured to compare the current in the power converter to a current reference to determine the logical error signal, and wherein the logical error signal causes a generation of the logical control signal from the digital controller,

wherein the digital controller is configured to control the power converter so the current in the power converter has a profile comprising a rising slope and a falling slope within a single clock period, and is configured to attempt to center the falling slope on the current reference.

2. The current control circuit of claim 1 , wherein the logical error signal is determined by a comparator.

3. The current control circuit of claim 1 , wherein the current control circuit further comprises a digital to analogue converter or a pulse width modulated interface to convert a digital current reference to the current reference.

4. The current control circuit of claim 3 , wherein the digital current reference is received from an external source.

5. The current control circuit of claim 1 , wherein the digital controller is arranged to generate said logical control signal with a timing calculated from the timing of previous transitions of said logical error signal.

6. The current control circuit of claim 1 , wherein the digital controller includes at least one of a field programmable gate array or a microprocessor.

7. A power converter having a current control circuit according to claim 1 .

8. The power converter of claim 7 , wherein the power converter is adapted to receive the logical control signal and respond thereto by closing or opening one or more switches.

9. An uninterruptible power supply unit comprising a power converter according to claim 7 .

10. The current control circuit of claim 1 , wherein the digital controller is configured to store a first time interval, the first time interval being between a first time defined by a regular clock edge and a second time defined by a crossing of the rising slope and the current reference, and configured to determine a second time interval based on the first time interval, the clock period, and a crossing factor, and configured to produce the logical control signal to cause the current in the power converter to transition from a rising slope to a falling slope at the second time interval after the second time.

11. The current control circuit of claim 10 , wherein the crossing factor is determined from a ratio of the second time interval and a third time interval as measured in a preceding clock cycle, the third time interval being delineated by the end of the second time interval and a subsequent time defined by a crossing of the falling slope and the current reference.

12. The current control circuit of claim 1 , wherein the digital controller is configured to cause the current in the power converter to transition from the falling slope to the rising slope on a regular clock edge.

13. A method of controlling the switching of a power converter comprising:

measuring the current in the power converter to determine a measured current;

comparing the measured current with a reference current to determine a logical current error signal; and

using the logical current error signal to cause a logical control signal with a fixed fundamental frequency to be generated from a digital controller to thereby control the switching of the power converter so the current in the power converter has a profile comprising a rising slope and a falling slope within a single clock period, and is generated to attempt to center the falling slope on the current reference.

14. The method of claim 13 , further comprising determining the logical current error signal using a comparator.

15. The method of claim 13 , further comprising converting a digital reference current to an analogue reference current to generate the reference current.

16. The method of claim 13 , further comprising generating the logical control signal for the power converter to open and close one or more switches.

17. The method of claim 13 , wherein said logical control signal is generated with a timing calculated from the timing of previous transitions of said logical current error signal.

18. The method of claim 13 , wherein the digital controller is a digital component such as a field programmable gate array or a microprocessor.

19. A current control circuit for a power converter to control the switching thereof, the current control circuit comprising:

a current measurement device for measuring a current in the power converter, wherein the current control circuit is configured to compare the current in the power converter to a current reference to determine a logical error signal; and

a digital controller using the logical error signal to produce a logical control signal with a fixed fundamental frequency for the power converter, wherein the digital controller is configured to:

control the power converter so a current in the power converter has a profile comprising a rising slope and a falling slope within a single clock period,

store a first time interval, the first time interval being between a first time defined by a regular clock edge and a second time defined by a crossing of the rising slope and the current reference,

determine a second time interval based on the first time interval, the clock period, and a crossing factor, and

produce the logical control signal to cause the current in the power converter to transition from a rising slope to a falling slope at the second time interval after the second time.

20. The current control circuit of claim 19 , wherein the crossing factor is determined from a ratio of the second time interval and a third time interval as measured in a preceding clock cycle, the third time interval being delineated by the end of the second time interval and a subsequent time defined by a crossing of the falling slope and the current reference.

21. The current control circuit of claim 19 , wherein the digital controller is configured to cause the current in the power converter to transition from the falling slope to the rising slope on a regular clock edge.