IP Library Granted Patent US 9,385,188
Granted Patent B2
US 9,385,188 · App. 14/372,103 · Granted Jul 5, 2016

Semiconductor device with termination region having floating electrodes in an insulating layer

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Quick Facts
Patent No.
US 9,385,188
App. No.
14/372,103
Granted
Jul 5, 2016
Kind
B2
Abstract

A semiconductor device which can suppress the influence of the external electric charge and can be efficiently manufactured is provided. The semiconductor device is provided with an active region in which a semiconductor element is disposed and a termination region between the active region and an edge surface of the semiconductor substrate. An insulating layer is disposed on at least a part of an upper surface of the termination region. A plurality of floating electrodes is disposed at an interval in the insulating layer in a direction from the active region toward the edge surface of the semiconductor substrate, and a width of the plurality of floating electrodes in a thickness direction of the semiconductor substrate is greater than a width of the plurality of floating electrodes in the direction from the active region toward the edge surface of the semiconductor substrate.

Claims (10)

1. A method for manufacturing a semiconductor device, the method comprising:

forming an insulating layer on a termination region of a semiconductor substrate, the termination region being between an active region in which a semiconductor element is formed and a part which is to be an edge surface of the semiconductor substrate;

forming a plurality of trenches at an interval in the insulating layer along a direction from the active region toward the part which is to be the edge surface of the semiconductor substrate, wherein a width of each of the plurality of trenches in a thickness direction of the semiconductor substrate is greater than a width of each of the plurality of trenches in the direction from the active region toward the part which is to be the edge surface of the semiconductor substrate;

forming a metal layer on the insulating layer; and

etching the metal layer in a state where the metal layer above the plurality of trenches is not masked, such that the metal layer in each trench remains, and the metal layers in the respective trenches are separated from each other, wherein

the insulating layer is formed also on the active region in the forming of the insulating layer,

the method further comprises forming a contact hole in the insulating layer on the active region, which is performed prior to the forming of the metal layer, wherein

the metal layer is formed also in the contact hole in the forming of the metal layer, and

the etching of the metal layer is performed in a state of masking the metal layer on the contact hole.

2. The method for manufacturing a semiconductor device according to claim 1 , wherein the forming of the plurality of trenches and the forming of the contact hole are performed by a common etching.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: TOYOTA JIDOSHA KABUSHIKI KAISHA
To: DENSO CORPORATION
Reel/Frame 052285/0419 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2014
From: HIRABAYASHI, YASUHIRO; SAKAKIBARA, AKINORI
To: TOYOTA JIDOSHA KABUSHIKI KAISHA
Reel/Frame 033305/0432 →