Method of separating a wafer of semiconductor devices
View Patent ↗A method according to embodiments of the invention includes providing a wafer comprising a semiconductor structure grown on a growth substrate. The semiconductor structure includes a light emitting layer disposed between an n-type region and a p-type region. The wafer includes trenches defining individual semiconductor devices. The trenches extend through an entire thickness of the semiconductor structure to reveal the growth substrate. The method further includes forming a thick conductive layer on the semiconductor structure. The thick conductive layer is configured to support the semiconductor structure when the growth substrate is removed. The method further includes removing the growth substrate.
1. A method comprising;
providing a wafer comprising a semiconductor structure grown on a growth substrate, the semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region, the wafer comprising trenches defining individual semiconductor devices, wherein the trenches extend through an entire thickness of the semiconductor structure to reveal the growth substrate, and wherein each individual semiconductor device comprises an n-contact connected to the n-type region and a p-contact connected to the p-type region, wherein the n- and p-contacts are formed on a same side of the semiconductor structure and wherein the n-contact surrounds the p-contact;
forming a thick conductive layer on the semiconductor structure, wherein the thick conductive layer is configured to support the semiconductor structure when the growth substrate is removed;
attaching the wafer to temporary wafer handling tape; and
removing the growth substrate, wherein immediately prior to removing the growth substrate, neighboring semiconductor devices are connected only through the growth substrate and through the temporary wafer handling tape;
wherein the thick conductive layer is a first thick conductive layer, the method further comprising forming a second thick conductive layer on the semiconductor structure, wherein the first thick conductive layer surrounds the second thick conductive layer, and the first and second thick conductive layers are separated by an insulating layer.
2. The method of claim 1 wherein the thick conductive layer is not formed in at least a portion of the trenches defining individual semiconductor devices such that after forming the thick conductive layer, the trenches extend through an entire thickness of the semiconductor structure and the thick conductive layer.
3. The method of claim 1 wherein forming a thick conductive layer on the semiconductor structure comprises:
forming a seed layer on a surface of the wafer;
forming a photoresist layer over the seed layer; and
patterning the photoresist layer to form openings, wherein after patterning a region of photoresist layer is disposed in the trenches defining individual semiconductor devices.
4. The method of claim 3 wherein forming a thick conductive layer comprises plating a thick metal layer in the openings formed in the photoresist layer, wherein after plating the thick metal layer is disposed over the regions of photoresist layer disposed in the trenches.
5. The method of claim 4 further comprising after plating a thick metal layer, removing a first portion of the photoresist layer, wherein the first portion of the photoresist layer is disposed over an individual semiconductor device.
6. The method of claim 5 further comprising after removing the first portion of the photoresist layer, planarizing a top surface of the wafer, wherein planarizing exposes tops of the regions of photoresist layer disposed in the trenches.
7. The method of claim 6 further comprising after planarizing, removing a second portion of the photoresist, the second portion comprising the regions of photoresist layer disposed in the trenches.
8. The method of claim 1 further comprising disposing an electrically insulating material in openings in the thick conductive layer.
9. The method of claim 8 wherein disposing an electrically insulating material in openings in the thick conductive layer comprises molding electrically insulating material in the openings in the thick conductive layer.
10. The method of claim 1 wherein the growth substrate is one of a non-III-nitride material substrate and a sapphire substrate.
11. A method comprising;
providing a wafer comprising a semiconductor structure grown on a growth substrate, the semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region, the wafer comprising trenches defining individual semiconductor devices, wherein the trenches extend through an entire thickness of the semiconductor structure to reveal the growth substrate, and wherein each individual semiconductor device comprises an n-contact connected to the n-type region and a p-contact connected to the p-type region, wherein the n- and p-contacts are formed on a same side of the semiconductor structure and wherein the n-contact surrounds the p-contact;
forming a thick conductive layer on the semiconductor structure, wherein the thick conductive layer is configured to support the semiconductor structure when the growth substrate is removed;
attaching the wafer to temporary wafer handling tape; and
removing the growth substrate, wherein immediately prior to removing the growth substrate, neighboring semiconductor devices are connected only through the growth substrate and through the temporary wafer handling tape;
wherein forming a thick conductive layer comprises:
forming a seed layer on a surface of the wafer;
forming a photoresist layer over the seed layer;
patterning the photoresist layer to form openings, wherein after patterning a region of photoresist layer is disposed in the trenches defining individual semiconductor devices; and
plating a thick metal layer in the openings formed in the photoresist layer, wherein after plating the thick metal layer is disposed over the regions of photoresist layer disposed in the trenches.
12. The method of claim 11 further comprising after plating a thick metal layer, removing a first portion of the photoresist layer, wherein the first portion of the photoresist layer is disposed over an individual semiconductor device.
13. The method of claim 12 further comprising after removing the first portion of the photoresist layer, planarizing a top surface of the wafer, wherein planarizing exposes tops of the regions of photoresist layer disposed in the trenches.
14. The method of claim 13 further comprising after planarizing, removing a second portion of the photoresist, the second portion comprising the regions of photoresist layer disposed in the trenches.
15. A method comprising;
providing a wafer comprising a semiconductor structure grown on a growth substrate, the semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region, the wafer comprising trenches defining individual semiconductor devices, wherein the trenches extend through an entire thickness of the semiconductor structure to reveal the growth substrate, and wherein each individual semiconductor devices comprises an n-contact connected to the n-type region and a p-contact connected to the p-type region, wherein the n- and p-contacts are formed on a same side of the semiconductor structure;
forming regions of a first material in the trenches;
after forming regions of a first material in the trenches, forming a thick conductive layer on the semiconductor structure, wherein the thick conductive layer is configured to support the semiconductor structure when the growth substrate is removed and wherein the thick conductive layer has a lateral extent that extends beyond an edge of the semiconductor structure;
removing the regions of first material;
attaching the wafer to a wafer handling structure; and
removing the growth substrate, wherein immediately prior to attaching the wafer to a wafer handling structure and removing the growth substrate, neighboring semiconductor devices are connected only through the growth substrate;
wherein the thick conductive layer is a first thick conductive layer, the method further comprising forming a second thick conductive layer on the semiconductor structure, wherein the first thick conductive layer surrounds the second thick conductive layer, and the first and second thick conductive layers are separated by an insulating layer.
16. The method of claim 15 further comprising stretching the wafer handling structure to separate neighboring semiconductor devices.
17. The method of claim 1 wherein the thick conductive layer has a lateral extent that extends beyond an edge of the semiconductor structure.
18. The method of claim 15 wherein the n-contact surrounds the p-contact.
19. The method of claim 15 wherein the thick conductive layer is not formed in at least a portion of the trenches defining individual semiconductor devices such that after forming the thick conductive layer, the trenches extend through an entire thickness of the semiconductor structure and the thick conductive layer.
20. The method of claim 15 wherein the growth substrate is one of a non-III-nitride material substrate and a sapphire substrate.