IP Library Granted Patent US 9,692,966
Granted Patent B2
US 9,692,966 · App. 14/402,627 · Granted Jun 27, 2017

Image capturing device and image capturing method

Inventors: Shinichi Hirata (Kanagawa, JP); Hiroshi Osawa (Kanagawa, JP); Kyoko Furumura (Tokyo, JP)
Assignees: Sony Corporation; Sony Interactive Entertainment Inc.
H04N5/23238G03B17/561G03B37/04G06T11/60H04N5/23206H04N5/2258
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Quick Facts
Patent No.
US 9,692,966
App. No.
14/402,627
Granted
Jun 27, 2017
Kind
B2
Abstract

A bus interface/camera control interface connects a processor and a plurality of imaging units. A control data pass-through logic exchanges data between the bus interface/camera control interface and the plurality of imaging units. A pass-through mask register includes: a write register used to specify, of the plurality of imaging units, one or more imaging units to be selected so as to selectively supply write data to the one or more imaging units; and a read register used to specify, of the plurality of imaging units, a single imaging unit to be selected so as to selectively receive read data from the single imaging unit. The control data pass-through logic can use the pass-through mask register to switch between input and output operations.

Claims (35)

1. An image capturing device comprising:

a plurality of imaging units;

an interface section adapted to connect the plurality of imaging units and a processor;

a logic circuit adapted to exchange data between the interface section and the plurality of imaging units;

a write register used to specify, of the plurality of imaging units, one or more imaging units to be selected so as to selectively supply write data to the one or more imaging units; and

a read register used to specify, of the plurality of imaging units, a single imaging unit to be selected so as to selectively receive read data from the single imaging unit,

wherein the logic circuit is switched between input and output operations by the write register and the read register.

2. The image capturing device of claim 1 ,

wherein each of the write register and the read register is a mask register that corresponds to the number of the plurality of imaging units, and

a significant value is set in each of corresponding bits of the mask register to specify the imaging unit or units to be selected.

3. The image capturing device of claim 2 ,

wherein the logic circuit includes

a plurality of switches each adapted to functionally turn ON or OFF channels of write data supplied to each of the plurality of imaging units, and

a multiplexer adapted to select, as an output stream, one input stream from among a plurality of input streams from the plurality of imaging units in a channel of read data received from the plurality of imaging units, and

wherein the write register is a mask register that switches between ON and OFF states of the plurality of switches, and the read register is a mask register that selects one input stream from among the plurality of input streams to the multiplexer.

4. The image capturing device of claim 1 , wherein, when a specific imaging unit is selected as a reference to set shooting parameters, the read register is set to a value that specifies the specific imaging unit as an imaging unit to be selected so as to read the shooting parameters from the specific imaging unit, and the write register is set to a value that specifies the remaining imaging units other than the specific imaging unit as imaging units to be selected so as to write the shooting parameters read from the specific imaging unit to the remaining imaging units.

5. The image capturing device of claim 1 , wherein, when one or more imaging units are selected as a group from among the plurality of imaging units, the read register is set to a value that specifies a specific imaging unit in the group as an imaging unit to be selected so as to read shooting parameters from the specific imaging unit in the group, and the write register is set to a value that specifies the remaining imaging units other than the specific imaging unit in the group as imaging units to be selected so as to write the shooting parameters read from the specific imaging unit to the remaining imaging units.

6. An image capturing method comprising:

providing a plurality of imaging units;

connecting the plurality of imaging units and a processor via an interface;

exchanging data between the interface and the plurality of imaging units via a logic circuit:

specifying, of the plurality of imaging units, one or more imaging units to be selected via a write register so as to selectively supply write data to the one or more imaging units; and

specifying, of the plurality of imaging units, a single imaging unit to be selected via a read register so as to selectively receive read data from the single imaging unit,

wherein the logic circuit is switched between input and output operations by the write register and the read register.

7. The image capturing method of claim 6 further comprising selecting, from among the plurality of imaging units, one or more imaging units as a group,

wherein, as a reference camera used to set shooting parameters, a specific imaging unit is selected from among the imaging units in the group,

the shooting parameters are read from the specific imaging unit in the group, and

the shooting parameters read from the specific imaging unit in the group are written to the remaining imaging units other than the specific imaging unit in the group.

8. A non-transitory, computer-readable recording medium storing a program for a computer, the program causing the computer to carry out actions, comprising:

providing a plurality of imaging units;

connecting the plurality of imaging units and a processor via an interface;

exchanging data between the interface and the plurality of imaging units via a logic circuit;

specifying, of the plurality of imaging units, one or more imaging units to be selected via a write register so as to selectively supply write data to the one or more imaging units; and

specifying, of the plurality of imaging units, a single imaging unit to be selected via a read register so as to selectively receive read data from the single imaging unit,

wherein the logic circuit is switched between input and output operations by the write register and the read register.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2017
From: SONY CORPORATION
To: SONY INTERACTIVE ENTERTAINMENT INC.
Reel/Frame 043761/0975 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2017
From: SONY INTERACTIVE ENTERTAINMENT INC.
To: SONY CORPORATION
Reel/Frame 042415/0215 →
CHANGE OF NAME Recorded May 17, 2017
From: SONY COMPUTER ENTERTAINMENT INC.
To: SONY INTERACTIVE ENTERTAINMENT INC.
Reel/Frame 042415/0217 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2014
From: HIRATA, SHINICHI; OSAWA, HIROSHI; FURUMURA, KYOKO
To: SONY COMPUTER ENTERTAINMENT INC.
Reel/Frame 034224/0269 →
Continuity (1)
Related Publication 20150145952A1 · May 28, 2015